Xilinx SP605, Hardware User'S Manual

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20 www.xilinx.com SP605 Hardware User Guide
UG526 (v1.9) February 14, 2019
Chapter 1: SP605 Evaluation Board
See the Winbond Serial Flash Memory Data Sheet for more information. [Ref 16]
See the XPS Serial Peripheral Interface Data Sheet (DS570) for more information. [Ref 4]
X-Ref Target - Figure 1-4
Figure 1-4: SPI Flash Interface Topology
Table 1-6: SPI x4 Memory Connections
U1 FPGA
Pin
Schematic Net Name
SPI MEM U32 SPI HDR J17
Pin # Pin Name Pin # Pin Name
AB2 FPGA_PROG_B – – 1 –
T14 FPGA_D2_MISO3 1 IO3_HOLD_B 2 –
R13 FPGA_D1_MISO2_R 9 IO2_WP_B 3 –
AA3 SPI_CS_B – – 4 TMS
AB20 FPGA_MOSI_CSI_B_MISO0 15 DIN 5 TDI
AA20 FPGA_D0_DIN_MISO_MISO1 8 IO1_DOUT 6 TDO
Y20 FPGA_CCLK 16 CLK 7 TCK
– – – – 8 GND
– – – – 9 VCC3V3
J46.2
(1)
SPIX4_CS_B 7 CS_B – –
Notes:
1. Not a U1 FPGA pin
U1
FPGA S PI Interf a ce
U32
J17
S PI x4
Fl as h
Memory
Win b ond
W25Q64FV S FIG
S PI Progr a m
He a der
S PI S elect
J u mper
ON = S PI X4 U32
OFF = S PI EXT. J17
S PIX4_C S _B
DIN, DOUT, CCLK
S PI_C S _B
2
J46
1
UG526_04_020819