ML605/SP605 Hardware Tutorial
5
UG669 (v3.0) March 15, 2011
AXI Interface Based ML605/SP605
MicroBlaze Processor Subsystem
Hardware Tutorial
Introduction
This tutorial provides the steps required to build and modify the Xilinx® ML605
MicroBlaze™ Processor Subsystem or the Xilinx SP605 MicroBlaze Processor Subsystem.
The tutorial starts with steps in building the basic subsystem. The basic subsystem is then
modified by adding the cores necessary to measure throughput on AXI Central DMA
(AXI_CDMA).
Additional information can be found in UG683,
EDK Concepts, Tools, and Techniques.
Readers are encouraged to refer to UG683 during the execution of this tutorial.
Users should allow approximately three hours to complete this entire tutorial.
Hardware and Software Requirements
The hardware and software requirements to run the basic tutorial are:
•
Xilinx ML605 evaluation board or Xilinx SP605 evaluation board
•
Two USB Type-A to Mini-B 5-pin cables
•
Ethernet cable (straight-through)
•
Serial communications utility program (e.g., Windows HyperTerminal or Tera Term)
•
ISE® Design Suite: Embedded Edition 13.1 which includes:
•
Integrated Software Environment (ISE)
•
Embedded Development Kit (EDK
•
Software Development Kit (SDK)
