Xilinx LogiCORE MicroBlaze, Product Manual

Page: 28 / 64

MicroBlaze Micro Controller System v1.3 www.xilinx.com 27
PG048 December 18, 2012
Chapter 4: Customizing and Generating the Core
.
C_IO_LOWADDR LMB I/O Module I/O bus address 0xFFFFFFFF
C_IO_MASK LMB I/O Module I/O bus address space decode mask 0xC0000000
C_LMB_AWIDTH LMB address bus width 32
C_LMB_DWIDTH LMB data bus width 32
C_INTC_HAS_FAST Use fast interrupt mode 1
C_INTC_ADDR_WIDTH Interrupt address width 12 - 16
(1)
1. Value depends on C_MEMSIZE: 12 for 4096, 13 for 8192, 14 for 16384, 15 for 32768, and 16 for 65536.
Table 4-4: Internal LMB_v10 Parameters Settings (ILMB)
Parameter Name Feature/Description Value
C_LMB_NUM_SLAVES Number of LMB slaves 1
C_LMB_AWIDTH LMB address bus width 32
C_LMB_DWIDTH LMB data bus width 32
C_EXT_RESET_HIGH Level of external reset 1 = active-High reset
Table 4-5: Internal LMB_v10 Parameters Settings (DLMB)
Parameter Name Feature/Description Value
C_LMB_NUM_SLAVES Number of LMB slaves 2
C_LMB_AWIDTH LMB address bus width 32
C_LMB_DWIDTH LMB data bus width 32
C_EXT_RESET_HIGH Level of external reset 1 = active-High reset
Table 4-6: Internal LMB BRAM IF Controller Parameters Settings (ILMB Controller)
Parameter Name Feature/Description Value
C_BASEADDR LMB BRAM base address 0
C_HIGHADDR LMB BRAM high address Value of MicroBlaze
MCS Parameter
C_MEMSIZE
C_MASK LMB decode mask 0x80000000
C_LMB_AWIDTH LMB address bus width 32
C_LMB_DWIDTH LMB data bus width 32
C_ECC Implement error correction and detection
All other ECC as well AXI and PLB parameters are don’t
care
0 = No ECC
Table 4-3: Internal I/O Module Parameters Settings (Cont’d)
Parameter Name Feature/Description Value