1-Gigabit Ethernet MAC v8.5 User Guide
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89
UG144 April 24, 2009
Using the Optional Management Interface
R
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Figure 8-8
shows access to the MDIO interface through the Management Interface.
For MDIO transactions, the following applies:
•
host_miim_sel
is ‘1’
•
host_opcode[1:0]
maps to the OP (opcode) field of the MDIO frame
•
host_addr
maps to the two address fields of the MDIO frame; PHYAD is
host_addr[9:5]
, and REGAD is
host_addr[4:0]
•
host_wr_data[15:0]
maps into the data field of the MDIO frame when
performing a write operation
•
The data field of the MDIO frame maps into
host_rd_data[15:0]
when
performing a read operation
The GEMAC core signals the host that it is ready for an MDIO transaction by asserting
host_miim_rdy
. A read or write transaction on the MDIO is initiated by a pulse on the
host_req
signal. This pulse is ignored if the MDIO interface already has a transaction in
progress. The GEMAC core then deasserts the
host_miim_rdy
signal while the
transaction across the MDIO is in progress. When the transaction across the MDIO
interface has been completed, the
host_miim_rdy
signal is asserted by the GEMAC core;
if the transaction is a read, the data is available on the
host_rd_data[15:0]
bus at this
time.
Figure 8-8:
MDIO Access through Management Interface
host_clk
host_addr9:0]
host_opcode1:0]
host_req
host_miim_sel
host_rd_data[15:0]
host_wr_data15:0]
host_rdy
*
*
* If a read transaction is initiated, the host_rd_data bus is valid
at the point indicated. If a write transaction is initiated, the
host_wr_data bus must be valid at the indicated point.
Simultaneous read and write is not permitted.
