FPGA Video Processing Development Platform AV6045 User Manual
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E_MDIO
G20
MIMO Management Data
Part 4.7: ARM Controller
An ARM chip (STM32F103) is mounted on the carrier board, and each
interface chip is reset through the IO port, and the registers of each interface
chip and the data communication with the FPGA are configured through I2C.
Figure 4-7-1: ARM STM32F103 Schematic
Figure 4-7-2: STM32F103 on the FPGA Board
