Wolfson WM8978, Manual, Page: 87 / 119

Production Data
WM8978
w
PD, Rev 4.5, October 2011
87
SYMBOL MIN TYPICAL MAX UNIT
t
line_midrail_on
500 ms
t
line_midrail_off
1 s
t
hp_midrail_on
500 ms
t
hp__midrail_off
6 s
t
dacint
2/fs
n
/fs
DAC Group Delay 29/fs
n
/fs
Table 65 Typical POR Operation (typical simulated values)
Notes:
1. The lineout charge time, t
line_midrail_on,
is mainly determined by the VMID pin charge time. This time
is dependent upon the value of VMID decoupling capacitor and VMID pin input resistance and
AVDD power supply rise time. The values above were measured using a 4.7
μ F capacitor.
2. It is not advisable to allow DACDAT data input during initialisation of the DAC. If the DAC data
value is not zero at point of initialisation, then this is likely to cause a pop noise on the analogue
outputs. The same is also true if the DACDAT is removed at a non-zero value, and no mute
function has been applied to the signal beforehand.
3. The lineout discharge time, t
line_midrail_off,
is dependent upon the value of the lineout coupling
capacitor and the leakage resistance path to ground. The values above were measured using a
10
μ F output capacitor.
4. The headphone charge time, t
hp_midrail_on,
is dependent upon the value of VMID decoupling
capacitor and VMID pin input resistance and AVDD power supply rise time. The values above
were measured using a 4.7
μ F VMID decoupling capacitor.
5. The headphone discharge time, t
hp_midrail_off,
is dependent upon the value of the headphone
coupling capacitor and the leakage resistance path to ground. The values above were measured
using a 100
μ F capacitor.
6. The VMIDSEL and BIASEN bits must be set to enable analogue output midrail voltage and for
normal DAC operation.