WIENER, Plein & Baus GmbH
13
www.wiener-d.com
The LED display of VM-DBA freezes at the detection of BERR, requiring a reset to re-
activate the display.
IRQ-enabled mode
VM-DBA generates an IRQ upon detecting a valid IRQ trigger. Subsequently VM-DBA
handles the whole IRQ cycle.
Passive mode
The response of VM-DBA to VME commands is suppressed (with the exception of an
unlocking sequence).
4.2.3
IRQ Setup
The VM-DBA has full interrupt capability in either RORA or ROAC mode. Interrupts can be
issued by the NIM/TTL input, by software or internal clock. The IRQ number (1 to 7) and ID
can be programmed.
4.2.4
VME Bus Analyzer
The
VME bus analyzer allows to sample all VME bus lines as a function of time in order to analyze
the sequence and timing of signals which has to match the VME bus specification. The digitization of
waveforms is triggered by a programmable selection of conditions as certain addresses or a VME
BERR, including an external signal received at the front-panel LEMO connector. Pre-and post trigger
sample ranges can be defined with a total length of 2048 samples. The sampling frequency is either
100MHz (10ns steps) or 200MHz (5ns steps).
Example of VME bus lines waveforms:
1 cycle = 10ns (100Mhz)
Master – Slave
DS-DTACK time
Length of data /
address strobe
Time between 2
VME data cycles
