Wersi DX 400, Assembly Manual

Page: 28 / 68

AM 334-01-502
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6. Plug-in Board EF 19 ---Special Effects, Digital Portion
Principles of Operation
Plug-in board EF 19 contains three interface circuits:
master/special effects, organ/computer (RS232) and
organ/cassette. Fig. 12 is the component layout of
EF19; refer to Fig. 13, EF 19's schematic diagram, for
this description -
a) Master/Special Effects Interface
Via address decoder 1C6, the master address bus selects
Icl0, 11, 12 and 13, which are then addressed by the
master data bus. Control signals PAO thru PA7 and PB0
thru P87 exist statically at the outputs of IC11 and IC12
respectively. PA4 thru PA7 and PBO thru PB7 control
the audio signal routing on the second special effects
board EF2O.
The 8-bit digital word at the output of Ic10 is converted
into an analog signal in IC3. By this means, all the
control voltages required on EF2O are transferred
serially.
Control signals for the digital reverb are available
statically at output pins 15 and 17 of 1C13. The 6ut-put
from pin 14 of 1C13 is used to quiet (squelch) the
amplifier on board AF 12.
b) R5232 Interface
1C9, a special RS232 interface IC, converts 8-bit parallel
data words into serial data and vice-versa, depending
upon the mode of operation. This serial signal (TXD) is
switchable in multiplexer 1C8 to cassette or to RS232
operation. When RS232 is selected, the signal goes to
TTL-to-RS232 driver 1C19, where it is inverted and
level-shifted to +/- 15 Volts.
Conversely, a serial RS232 signal from an external
computer enters RS232-to-TTL receiver 1C18 and is
level-shifted to +5 Volts. It then passes through
multiplexer 1C8 to 1C9, where it is converted into 8-bit
parallel data.
c) Cassette Interface
1C9 converts an 8-bit data word from the master bus
into serial data, just as in RS232 operation. This
serial signal is then applied to 1C14, pin 12, and from
1C14 is applied to the cassette recorder as data to be
recorded -
An incoming serial signal from a cassette recorder is
amplified by IC1, conditioned and shaped in 1C7 and
ICS and applied to 1C9, where it is reconverted into
parallel data.