GR64 Integrators Manual
Page: 47/104
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement.
Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable
5.8
Powering the Wireless CPU ON and OFF (ON/OFF)
Pin
Name
Direction
Function
14
ON/OFF
Input
Device on/off control
The ON/OFF description below references a GR64001 Wireless CPU variant. The
timing is also valid for the GR64002 variant with the exception that VREF can be
excluded since it is input to the Wireless CPU by the application. VREF shall in the
GR64002 variant implementation be seen as the Wireless CPU’s internal logical
voltage supply.
5.8.1
Turning the Wireless CPU On
Figure 13: Power On timing
The GR64 power ON sequence is shown above. The significant signals are VCC,
ON/OFF and VREF, shown by solid lines. The other signals (in dashed lines) are
internal to the Wireless CPU and are shown for reference purposes only.
