GR64 Integrators Manual
Page: 5/104
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement.
Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable
2.7
PRODUCT MARKING ..................................................................................................20
3
Abbreviations ...................................................................................... 21
4
Mechanical Description ........................................................................ 24
4.1
INTERFACE DESCRIPTION...........................................................................................24
4.2
PHYSICAL DIMENSIONS ..............................................................................................26
5
System Connector Interface.................................................................. 28
5.1
OVERVIEW..................................................................................................................28
5.2
DEALING WITH UNUSED PINS .....................................................................................31
5.3
GENERAL ELECTRICAL AND LOGICAL CHARACTERISTICS............................................33
5.3.1
LEVEL TRANSLATOR INTERFACES .......................................................................34
5.4
GROUNDS ..................................................................................................................35
5.4.1
ANALOGUE GROUND (AREF)...............................................................................36
5.4.2
COMMON GROUND (GND)..................................................................................36
5.5
REGULATED POWER SUPPLY INPUT (VCC) ...................................................................37
5.6
VOLTAGE REFERENCE (VREF)......................................................................................39
5.6.1
VREF AS AN OUTPUT FROM THE WIRELESS CPU ..................................................40
5.6.2
VREF AS AN INPUT TO THE WIRELESS CPU ..........................................................41
5.7
BATTERY CHARGING INPUT (CHG_IN).........................................................................41
5.7.1
CHARGING PROCESS ..........................................................................................43
5.7.2
SERIES DIODE .....................................................................................................44
5.7.3
BATTERY SELECTION ..........................................................................................44
5.8
POWERING THE WIRELESS CPU ON AND OFF (ON/OFF) ...............................................47
5.8.1
TURNING THE WIRELESS CPU ON ........................................................................47
5.8.2
TURNING THE WIRELESS CPU OFF.......................................................................49
5.9
ANALOGUE AUDIO .....................................................................................................51
5.9.1
AUXILIARY AUDIO TO WIRELESS CPU (AUXI)........................................................52
5.9.2
AUXILIARY AUDIO FROM WIRELESS CPU (AUXO)..................................................53
5.9.3
MICROPHONE SIGNALS (MICIP, MICIN)................................................................54
5.9.4
SPEAKER SIGNALS (EARP, EARN) .........................................................................55
5.10
PCM DIGITAL AUDIO (SSP)......................................................................................56
