VMIC VMIVME-3124, Product Manual

Page: 8 / 39

500-003124-000
ii
SECTION 5. CONFIGURATION AND INSTALLATION (Concluded) Page
5.3.1 Board Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.3.2 Address Modifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5.3.3 Input Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.4 ANALOG INPUT CONNECTOR DESCRIPTION. . . . . . . . . . . . . . . . . 5-5
5.5 CALIBRATION PROCEDURES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6
5.5.1 Equipment Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6
5.5.2 Instrumentation Amp Offset Calibration . . . . . . . . . . . . . . . . . . . . . . . . 5-6
5.5.3 Unipolar 0-10 V Offset and Gain Calibration . . . . . . . . . . . . . . . . . . . . 5-6
5.5.4 Bipolar ±5 V Offset and Gain Calibration . . . . . . . . . . . . . . . . . . . . . . . 5-7
5.5.5 Bipolar ±10 V Offset and Gain Calibration . . . . . . . . . . . . . . . . . . . . . . 5-7
5.5.6 Built-In-Test Voltage Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
SECTION 6. MAINTENANCE
6.1 MAINTENANCE . . . . . . . . . . . . . . . . . . . . 6-1
6.2 MAINTENANCE PRINTS. . . . . . . . . . . . . . . . . 6-1
LIST OF FIGURES
Figure Page
3.2-1 VMIVME-3124 Functional Block Diagram . . . . . . . . . . 3-2
5.3-1 VMIVME-3124 Configuration Jumper Locations . . . . . . . . 5-2
5.4-1 P3 Connector . . . . . . . . . . . . . . . . . . . . . 5-5
LIST OF TABLES
Table Page
4.1-1 VMIVME-3124 Memory Map: Differential Inputs, Normal Buffer . . 4-1
4.1-2 VMIVME-3124 Memory Map: Differential Inputs, Maximum Buffer. . 4-2
4.1-3 VMIVME-3124 Memory Map: Single-Ended Inputs . . . . . . 4-3
4.2.1-1 Board Configuration Register Contents . . . . . . . . . . 4-4
4.2.3-1 Board Control/Status Register Contents . . . . . . . . . . 4-5
4.2.3-2 Board Control/Status Register Modes . . . . . . . . . . 4-6
4.2.5-1 LSB Weight . . . . . . . . . . . . . . . . . . 4-7
4.3-1 BIT Values for 0-10 V Range . . . . . . . . . . . . . 4-8
4.3-2 BIT Values for

5 V Range . . . . . . . . . . . . . . 4-9
4.3-3 BIT Values for

10 V Range . . . . . . . . . . . . . 4-9
4.6-1 Voltage Seen by the ADC . . . . . . . . . . . . . . 4-10
5.3.1-1 Address Selection Jumpers. . . . . . . . . . . . . . 5-3
5.3.2-1 Address Modifier Jumper Settings . . . . . . . . . . . 5-4
5.3.3-1 Input Configuration Jumpers . . . . . . . . . . . . . 5-4
5.4-1 P2 Analog Connector Pinout . . . . . . . . . . . . . 5-5
APPENDIX
Assembly Drawing, Parts List, and Schematic
TABLE OF CONTENTS (Concluded)