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VMICPCI-7611 Product Manual
PCI Interrupts
Interrupts on Peripheral Component Interconnect (PCI) Local Bus are optional and
defined as “level sensitive,” asserted low (negative true), using open drain output
drivers. The assertion and de-assertion of an interrupt line, INTx#, is asynchronous to
CLK. A device asserts its INTx# line when requesting attention from its device driver.
Once the INTx# signal is asserted, it remains asserted until the device driver clears the
pending request. When the request is cleared, the device de-asserts its INTx# signal.
PCI defines one interrupt line for a single function device and up to four interrupt
lines for a multifunction device or connector. For a single function device, only INTA#
may be used while the other three interrupt lines have no meaning. Figure 3-1 on
page 44 depicts the VMICPCI-7611 interrupt logic pertaining to CompactPCI
operations and the PMC site.
2B
43
DOS Internal Use
Same as Real Mode
2C
44
DOS Internal Use
Same as Real Mode
2D
45
DOS Internal Use
Same as Real Mode
2E
46
DOS Internal Use
Same as Real Mode
2F
47
DOS Print Spooler Driver
Same as Real Mode
30-60
48-96
Reserved by DOS
Same as Real Mode
61-66
97-102
User Available
Same as Real Mode
67-71
103-113
Reserved by DOS
Same as Real Mode
72
114
IRQ10
Not Assigned
73
115
IRQ11
Not Assigned
74
116
IRQ12
Mouse
75
117
IRQ13
Math Coprocessor
76
118
IRQ14
AT Hard Drive
77
119
IRQ15
Flash Drive
78-7F
120-127
Reserved by DOS
Same as Real Mode
80-F0
128-240
Reserved for BASIC
Same as Real Mode
F1-FF
241-255
Reserved by DOS
Same as Real Mode
Table 3-3 PC/AT Interrupt Vector Table (Continued)
INTERRUPT NO.
IRQ
LINE
REAL MODE
PROTECTED MODE
HEX
DEC
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