Vmetro M5210RP-EFF, User Manual

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M5000 Series: User Guide Issued June 20, 2007
Universe IID Configuration Examples
Initialization Sequence
By performing the list of cycles shown in the table below, the mapping for this configuration
example is achieved.
1) This column shows write data for configuration from PCI
TABLE B-5.
Initialization sequence for VMEbus slave image config. example.
Write from VME PCI Data 1) Result:
D:0x0000.0000 to A:0x000F04 0x0000.0000 VSI_0: Base Address set to 0x000000
D:0x0050.0000 to A:0x000F08 0x0000.5000 VSI_0: Bound Address set to 0x005000
D:0x0000.0000 to A:0x000F0C 0x0000.0000 VSI_0: Translation Offset set to 0x000000
D:0x0200.E080 to A:0x000F00 0x80E0.0002 VSI_0: Enable Image, VAS=A16, LAS=Config Space,
PGM=both, SUPER=Supervisor, other options disabled.
D:0x0000.1000 to A:0x000F18 0x0010.0000 VSI_1: Base Address set to 0x100000
D:0x0000.4000 to A:0x000F1C 0x0040.0000 VSI_1: Bound Address set to 0x400000
D:0x0000.0002 to A:0x000F20 0x0200.0000 VSI_1: Translation Offset set to 0x2000000
D:0x4100.F180 to A:0x000F14 0x80F1.0041 VSI_1: Enable Image, VAS=A24, LAS=I/O Space,
PGM=both, SUPER=both, LLRMW=enabled, other
options disabled.
D:0x0000.0040 to A:0x000F2C 0x4000.0000 VSI_2: Base Address set to 0x4000.0000
D:0x0000.0080 to A:0x000F30 0x8000.0000 VSI_2: Bound Address set to 0x8000.0000
D:0x0000.0020 to A:0x000F34 0x2000.0000 VSI_2: Translation Offset set to 0x2000.0000
D:0x0000.F2E0 to A:0x000F28 0xE0F2.0000 VSI_2: Enable Image, VAS=A32, LAS=Mem. Space,
PGM=both, SUPER=both, PWEN&PREN= enabled,
other options disabled.