VIPA PC-CPU 486, Manual

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Manual VIPA PC-CPU 486 Chapter 4 Deployment of the PC-CPU
HB111E - Rev. 02/32 4-11
Communication PC with DP master
The communication between the PC and the DP master of the PC-CPU
486DPM takes place via a Dualport-RAM. The master communicates with
the slaves and provides the data via the Dualport-RAM for the PC. Here
you may create a maximum of 1024Byte data for inputs and outputs.
The PC accesses the Dualport-RAM via C-functions, that will be described
in the following.
At the PC the address range of the Dualport-RAM is fixed. At the DP
master you may access an address range from 0 ... 1023.
The Dualport-RAM has a size of 8kByte and is organized as follows:
reserved
Profibus-DP input
Profibus-DP output
Block administration input
Block administration output
Flag area
C800:0000h
C800:0400h
C800:0800h
C800:0C00h
C800:1000h
C800:1400h
C800:1800h
C800:1C00h
C800:2000h
reserved
reserved
(1k)
(1k)
(1k)
(1k)
(1k)
(1k)
(1k)
(1k)
WinNCS project engineering0
(address range: 0 ... 1023)
WinNCS project engineering
(address range: 0 ... 1023)
8kByte
Address range PC side DP master
Outline
Structure
Dualport-RAM