VIA Technologies EPIA-P910 User Manual Download Page 1

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2.05-07022020-154800

USER MANUAL

VIA EPIA-P910

Highly-integrated low-power platform

with rich multimedia and I/O capabilities

Summary of Contents for EPIA-P910

Page 1: ...2 05 07022020 154800 USER MANUAL VIA EPIA P910 Highly integrated low power platform with rich multimedia and I O capabilities...

Page 2: ...ation to notify any person of such change VIA Technologies Inc reserves the right the make changes to the products described in this manual at any time without prior notice Regulatory Compliance FCC A...

Page 3: ...power cord where people will step on it Always unplug the power cord before inserting any add on card or module If any of the following situations arise get the equipment checked by authorized service...

Page 4: ...S 2 x USB 3 0 6 x USB 2 0 Gigabit Ethernet 2 x SATA and 12V DC in Optional Accessories I O Expansion Cards Part Number Description EPIA P910 A Front I O card with 2 LEDs 1 power button 3 audio jacks a...

Page 5: ...DC in Power Connector 15 2 2 8 CMOS Battery Connector 16 2 2 9 SPI Flash Connector 16 3 Jumpers 17 3 1 Clear CMOS Jumper 18 3 2 Backlight Power Jumper 19 3 3 LVDS Panel Power Jumper 19 4 Expansion Sl...

Page 6: ...Display Device 1 and 2 40 6 6 2 3 Panel Type 40 6 6 2 4 Panel Type2 41 6 6 3 PMU_ACPI Configuration 42 6 6 3 1 Other Control 42 6 6 3 2 AC Loss Auto restart 43 6 6 3 3 USB S4 WakeUp 43 6 6 4 SDIO_CR...

Page 7: ...ireless Accessories 51 A 1 Installing the VIA EMIO 1533 USB Wi Fi Module 51 A 2 Installing the VIA EMIO 5531 USB Wi Fi Bluetooth Module 53 Appendix B Pin Header and Connector Vendors List 55 Appendix...

Page 8: ...ansion card 25 Figure 30 Suggested minimum chassis dimensions 26 Figure 31 Suggested minimum internal chassis ceiling height 26 Figure 32 Suggested keepout areas 27 Figure 33 Illustration of the Main...

Page 9: ...VIA EPIA P910 User Manual ix Figure 57 Installing the Wi Fi antenna cable VIA EMIO 5531 54 Figure 58 Connecting the Wi Fi antenna cable to the VIA EMIO 5531 module 54...

Page 10: ...ctors pinouts 11 Table 10 SATA power connector pinouts 12 Table 11 KB MS LPC GPIO SMBus combination pin header pinouts 13 Table 12 USB 2 0 Front panel Audio combination pin header pinouts 14 Table 13...

Page 11: ...kage measuring 21mm x 21mm The VIA Eden X4 processor delivers a superb performance on multi tasking multimedia playback productivity and internet browsing in a low power budget In addition it is ideal...

Page 12: ...VIA VT2021 High Definition Audio Codec Onboard Super I O Fintek F81801U I Super I O controller Expansion I O 3 x PCIe x1 and 3 x USB 2 0 through High Speed Extension slot Onboard I O 1 x KB MS LPC SM...

Page 13: ...tor Pico ITX 10cm x 7 2cm 3 9 x 2 8 Compliance CE FCC Note As the operating temperature provided in the specifications is a result of testing performed in a testing chamber a number of variables can i...

Page 14: ...ATA connector 1 6 CN2 Audio USB 2 0 Front Panel combination pin header 7 CN1 KB MS LPC GPIO SMBus combination pin header 8 LVDS1 LVDS panel connector 9 JM3 LVDS panel power jumper 10 JM2 Backlight pow...

Page 15: ...VIA EPIA P910 User Manual 5 1 4 Product Dimensions Figure 2 Mounting holes and dimensions of the VIA EPIA P910...

Page 16: ...VIA EPIA P910 User Manual 6 1 5 Height Distribution Figure 3 Height distribution of the VIA EPIA P910...

Page 17: ...selection of frequently used ports as part of the external I O coastline 2 1 External I O Ports Figure 4 Back panel I O ports Item Description 1 RJ1 Gigabit Ethernet port 2 USB1 USB 3 0 port 3 USB2 US...

Page 18: ...Speed status Link LED Left LED on RJ 45 connector Active LED Right LED on RJ 45 connector Link Off Off Off Speed_10Mbit The LED is always On in either Green or Orange colors Flash in Yellow color Spe...

Page 19: ...a1 6 TMDS Data1 7 TMDS Data0 Shield 8 TMDS Data0 9 TMDS Data0 10 TMDS Clock Shield 11 TMDS Clock 12 TMDS Clock 13 DDC CEC Ground 14 CEC 15 SCL 16 SDA 17 Reserved N C on device 18 5V Power 19 Hot Plug...

Page 20: ...eled as LVDS1 The pinouts of the connector are shown below Figure 9 LVDS panel connector diagram Pin Signal Pin Signal 1 LVDSD0 2 LVDSD1 3 LVDSD0 4 LVDSD1 5 GND 6 GND 7 PVDD2 8 LVDSD2 9 PVDD2 10 LVDSD...

Page 21: ...connected the 7th pin will be a ground pin The SATA connectors are labeled as SATA1 and SATA2 The pinouts of the SATA connectors are shown below Figure 10 SATA connectors diagram SATA1 SATA2 Pin Signa...

Page 22: ...provides both 5V and 12V directly through the board to the SATA drives The SATA power connector is labeled as PWR2 The pinouts of the SATA power connector are shown below Figure 11 SATA power connecto...

Page 23: ...n header are shown below Figure 12 KB MS LPC GPIO SMBus combination pin header diagram Pin Signal Pin Signal 1 LAD3 2 GND 3 LAD2 4 SIO_CLK1 5 LAD1 6 PCICLK3 7 LFRAME 8 LDRQ0 9 LAD0 10 SERIRQ 11 PCIRST...

Page 24: ...D HDD LED case speaker S PDIF out Line out Line in and Mic in jacks The pinouts of the pin header are shown below Figure 13 USB 2 0 Front panel Audio combination pin header diagram Pin Signal Pin Sign...

Page 25: ...fan connector are shown below Figure 14 System CPU fan connector diagram Pin Signal 1 FANIN1 2 12V FAN 3 GND Table 13 System CPU fan connector pinouts 2 2 7 DC in Power Connector The VIA EPIA P910 ha...

Page 26: ...wn below Figure 16 CMOS battery connector diagram Pin Signal 1 RTC_BAT 2 GND Table 15 CMOS battery connector pinouts 2 2 9 SPI Flash Connector The VIA EPIA P910 has one 8 pin SPI flash connector The S...

Page 27: ...ting There are two settings of the jumper pin Short and Open The pins are Short when a jumper cap is placed on the pair of pins The pins are Open if the jumper cap is removed In addition there are jum...

Page 28: ...1 and 2 afterwards Setting the jumper while the system is on will damage the board The default setting is Short pins 1 and 2 Figure 19 Clear CMOS jumper diagram Setting Pin 1 Pin 2 Pin 3 Normal defau...

Page 29: ...Setting Pin 1 Pin 2 Pin 3 12V default Short Short Open 5V Open Short Short Table 18 Backlight power jumper settings 3 3 LVDS Panel Power Jumper The VIA EPIA P910 has one jumper that control the volta...

Page 30: ...VSUS 6 5VSUS 7 12V 8 12V 9 GND 10 GND 11 GND 12 GND 13 GND 14 GND 15 TVCLKRIN 16 MICIN2_R 17 SPDIF_TX1 18 MICIN2_L 19 MCVREF02 20 LINE2_R 21 SENSE_B 22 LINE2_L 23 GND 24 GND 25 FANCTL2 26 SPEAK_BZ 27...

Page 31: ...SBHP3 82 DVP1D3 83 GND 84 DVP1D2 85 PEXRX2 86 DVP1D1 87 PEXRX2 88 DVP1D0 89 GND 90 GND 91 PETN2 92 USBHP4 93 PETP2 94 USBHP4 95 GND 96 GND 97 PE6CLK 98 USBHP2 99 PE6CLK 100 USBHP2 101 GND 102 GND 103...

Page 32: ...DDR3 1600 1333 1066 memory The memory slot is labeled as SODIMM1 The location of the DDR3 memory slot is shown below Figure 23 DDR3 SODIMM memory slot diagram 4 2 1 Installing a Memory Module Step 1...

Page 33: ...the memory module should not exceed to 85 C This helps to prevent damage of the memory module The memory thermal pad to be used is requires a certain thickness in order to make contact with the memor...

Page 34: ...clasps push the locking clasps horizontally outward away from the SODIMM memory module Figure 27 Disengaging the SODIMM locking clasps Step 2 When the locking clasps have cleared the SODIMM memory mod...

Page 35: ...through CN1 and CN2 pin headers Align and attach the board to board connector on the bottom of the VIA EPIA P910 A I O expansion card with the CN1 and CN2 blocks on the VIA EPIA P910 Figure 29 Connect...

Page 36: ...I O coastline should have a buffer of 1 00mm The side on the opposite end of the I O coastline should have a buffer of at least 5 00mm The two sides adjacent to the I O coastline should have at least...

Page 37: ...VIA EPIA P910 User Manual 27 5 2 3 Suggested keepout areas The figure below shows the areas of the board that we recommend should be left unobstructed Figure 32 Suggested keepout areas...

Page 38: ...the highlighted item Select the item Esc Jumps to the Exit screen or returns to the previous screen 1 Increase the numeric value 1 Decrease the numeric value F1 General help2 F2 Previous value F3 Load...

Page 39: ...that is installed on the hardware platform 6 4 3 System Language This option allows the user to configure the language that the user wants to use 6 4 4 System Date This section shows the current syst...

Page 40: ...screen Sub screen links can be identified by the preceding right facing arrowhead Figure 34 Illustration of the Advanced Settings screen The Advanced Settings screen contains the following links ACPI...

Page 41: ...wer management related functions Figure 35 Illustration of the ACPI Settings screen 6 5 1 1 Enable Hibernation Enable disable system ability to Hibernate 6 5 1 2 ACPI Sleep State Select the highest AC...

Page 42: ...ustration of the S5 RTC Wake Settings screen 6 5 2 1 Wake system with Fixed Time Enable or disable system wake on alarm event When enabled system will wake on the hr min sec specified 6 5 2 2 Wake sys...

Page 43: ...thermal controls can be set Figure 37 Illustration of CPU Configuration screen 6 5 3 1 TM3 The TM3 Function has two settings Disabled and Enabled When the setting is changed to Disabled the CPU s buil...

Page 44: ...e the settings of the SATA configuration settings Figure 38 Illustration of SATA Configuration screen 6 5 4 1 SATA Mode This option allows the user to manually configure SATA controller for a particul...

Page 45: ...tatus screen has no editable fields The system temperature is taken from an optional sensor that is connected to the J5 pin header Figure 39 Illustration of PC Health Status screen 6 5 5 1 Fan Turbo M...

Page 46: ...n screen 6 5 6 1 CPU Spread Spectrum The Spread Spectrum Setting feature enables the BIOS to modulate the clock frequencies originating from the board The settings are in percentages of modulation Hig...

Page 47: ...The EuP ErP Lot6 Support feature enables the BIOS to reduce the power draw to less than 1W when the system is in standby mode This feature has two options enabled and disabled 6 5 7 3 S5 Wakeup On LA...

Page 48: ...ovide access to a sub screen Sub screen links can be identified by the preceding right facing arrowhead Figure 42 Illustration of Chipset Settings screen The Chipset Settings screen contains the follo...

Page 49: ...forces the BIOS to be fixed at 800 MHz for DDR3 memory modules 533 MHz The 533 MHz option forces the BIOS to be fixed at 1066 MHz for DDR3 memory modules 566 MHz The 566 MHz option forces the BIOS to...

Page 50: ...y Device 1 and Select Display Device 2 are set to the same interface then any display device connected to the other interface will not function For example if both Select Display 1 and 2 are set to CR...

Page 51: ...d with the system The panel types are predefined in the VGA VBIOS Panel Type Resolution Panel Type Resolution 00 640 x 480 08 800 x 480 01 800 x 600 09 1024 x 600 02 1024 x 768 10 1366 x 768 03 1280 x...

Page 52: ...PI Configuration The PMU_ACPI Configuration screen can be used to set a number of power management related functions Figure 45 Illustration of PMU_ACPI Configuration screen 6 6 3 1 Other Control Figur...

Page 53: ...ff option keeps the system in an off state until the power button is pressed again Power On The Power On option restarts the system when the power has returned Last State The Last State option restore...

Page 54: ...are Enabled and Disabled 6 6 4 3 Voltage Support 1 8v Available selections are Enabled and Disabled 6 6 4 4 High Speed Support Available selections are Enabled and Disabled 6 6 4 5 Driver Type Select...

Page 55: ...ilable selections are 1 seconds 2 seconds 4 seconds 8 seconds 16 seconds 32 seconds 64 seconds 120 seconds 256 seconds 512 seconds 1024 seconds and get information from other source 6 6 4 11 Card Read...

Page 56: ...ion Figure 48 Illustration of Others Configuration screen 6 6 5 1 WATCHDOG Timer Enable When this feature is enabled an embedded timing device automatically prompts corrective action upon system malfu...

Page 57: ...be run during the system boot sequence 6 7 1 1 Quiet Boot The Quiet Boot feature hides all of the Power on Self Test POST messages during the boot sequence Instead of the POST messages the user will...

Page 58: ...e Esc hotkey can also be used to trigger this command 6 8 3 Save Changes and Reset Save all changes to the BIOS and reboot the system The new system configuration parameters will take effect 6 8 4 Dis...

Page 59: ...VIA EPIA P910 User Manual 49 6 8 8 Restore Defaults Restore default values for all setup options...

Page 60: ...siting www viatech com for the latest updated drivers Installing a third party driver such as the ALSA driver from the Advanced Linux Sound Architecture project for integrated audio 7 2 Technical Supp...

Page 61: ...d standoff in the chassis Align the two mounting holes on the VIA EMIO 1533 module with the mounting holes on the standoffs And then secure the VIA EMIO 1533 module in place with two screws Figure 51...

Page 62: ...the toothed washer fasten it with the nut and install the external antenna Figure 53 Installing the Wi Fi antenna cable VIA EMIO 1533 Step 4 Connect the other end of the Wi Fi antenna cable to the mic...

Page 63: ...VIA EMIO 5531 module in place with two screws Figure 55 Installing the VIA EMIO 5531 module to the chassis Step 2 Connect one end of USB Wi Fi cable to the onboard USB 2 0 connector WLAN on VIA EPIA...

Page 64: ...the toothed washer fasten it with the nut and install the external antenna Figure 57 Installing the Wi Fi antenna cable VIA EMIO 5531 Step 4 Connect the other end of the Wi Fi antenna cable to the mic...

Page 65: ...tion pin header 30 PINREX 232 97 15GBEB LVDS1 LVDS panel connector 24 ACES 87216 2416 06 JM2 Backlight power jumper 3 Neltron 2199SA 03G 301523 JM3 LVDS panel power jumper 3 Neltron 2199SA 03G 301523...

Page 66: ...100 240V 1 5A 50 60Hz DC Output 12 0V 5 0A MAX 60W Operating System Windows 7 SP1 x64 C 1 1 Burn in 3DMark06 1920x1080 Demo mode Test Condition Volts Amperes Watts Maximum 12 18 1 368 16 662 Average...

Page 67: ...0 687 4654 Email embedded viatech com Email embedded via tech eu Taiwan Headquarters USA Europe Tsinghua Science Park Bldg 7 No 1 Zongguancun East Road Haidian Dist Beijing 100084 China Tel 86 10 5985...

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