![VersaLogic VL-EBX-37 Reference Manual Download Page 70](http://html1.mh-extra.com/html/versalogic/vl-ebx-37/vl-ebx-37_reference-manual_1006785070.webp)
Special Registers
EBX-37 Reference Manual
64
8254 Timer Base Address
This register is used to set the I/O base address on the 8254 Timers. The timers only require 4
continuous bytes of I/O memory space (byte addressing only). The address must be 8-byte
aligned. Two 8-bit registers must be set. Make sure there is a space opened up in the LPC space
for this base address.
TIMBASEMS (Read/Write) CA6h (or C96h)
D7
D6
D5
D4
D3
D2
D1
D0
TIMBASE15 TIMBASE14 TIMBASE13 TIMBASE12
TIMBASE11 TIMBASE10 TIMBASE9
TIMBASE8
Table 33: 8254 Timer Base MS Address Register Bit Assignments
Bit
Mnemonic
Description
D7-D0
TIMBASE(15:8)
Most significant 8 bits of the 16-bit Timer Base Address. Default is 0x3F
(default timer base address is 0x3FFC)
TIMBASELS (Read/Write) CA7h (or C97h)
D7
D6
D5
D4
D3
D2
D1
D0
TIMBASE7
TIMBASE6 TIMBASE5
TIMBASE4
TIMBASE3
TIMBASE2
0
0
Table 34: 8254 Timer Base LS Address Register Bit Assignments
Bit
Mnemonic
Description
D7-D2
TIMBASE(7:2)
Most significant 6 bits of the 16-bit Timer Base Address. Default is 0x3F
(default timer base address is 0x3FFC)
D1-D0
0
These read-only bits always return 0