VersaLogic Ocelot, Reference Manual

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Distributor of VersaLogic Corporation: Excellent Integrated System Limited
Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
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Special Registers
VL-EPMs-21 Reference Manual 53
PC/104 I/O Block Enable Registers
These registers are used to configure the LPC-to-PC/104 bus bridge. I/O port addresses are
divided into blocks. Each block has its own enable bit that allows the I/O ports within the block
to be forwarded from the LPC bus to the PC/104 bus and vice versa. These registers are set in
CMOS Setup, but are accessible to user software for runtime configuration as well.
Enabling a particular I/O range block does not necessarily mean the full range will be available
on the PC/104 bus if other devices are already consuming ports within the block range. See the
"I/O Map" section.
PC104_BLK_EN0 (Read/Write) 1D4h
D7 D6 D5 D4 D3 D2 D1 D0
IOBLK_EN7 IOBLK_EN6 IOBLK_EN5 IOBLK_EN4 IOBLK_EN3 IOBLK_EN2 IOBLK_EN1 IOBLK_EN0
Table 27: PC/104 I/O Block Enable Register 0 Bit Assignments
Bit Mnemonic Description
D7
IOBLK_EN7
PC/104 I/O port range 0x378 - 0x3E7 enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D6
IOBLK_EN6
PC/104 I/O port range 0x300 - 0x377 enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D5
IOBLK_EN5
PC/104 I/O port range 0x2F8 - 0x2FF enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D4
IOBLK_EN4 PC/104 I/O port range 0x2F0 - 0x2F7 enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D3
IOBLK_EN3 PC/104 I/O port range 0x2E8 - 0x2EF enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D2
IOBLK_EN2 PC/104 I/O port range 0x200 - 0x2E7 enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D1
IOBLK_EN1
PC/104 I/O port range 0x100 - 0x1CF enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus
D0
IOBLK_EN0
PC/104 I/O port 0x080 enable
0 = disabled on PC/104 bus
1 = enabled on PC/104 bus (default)
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