Distributor of VersaLogic Corporation: Excellent Integrated System Limited
Datasheet of VL-CBR-2012 - 20" 24-BIT LVDS CABLE
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Interfaces and Connectors
VL-EPMs-21 Reference Manual
29
Video Interface (J4 and J6)
An on-board video controller integrated into the chipset provides high-performance LVDS video
output for the VL-EPMs-21. The VL-EPMs-21 can also be operated with a VGA monitor through
an adapter or without a video card attached (headless).
D
ISPLAY
C
ONTROL
Pin
Signal
Name
Function
1
VEN
Backlight inverter power enable
2
GMbus_CLK
I2C-based backlight brightness control clock
3
GND
Ground
4
GMbus_DATA I2C-based backlight brightness control data
5
BLEN
Backlight enable
6
DDC_CLK
Display Data Channel clock (EDID) for plug-n-play
7
GND
Ground
8
DDC_DATA
Display Data Channel data (EDID) for plug-n-play
9
BLCTL
Simple PWM-based backlight brightness control
C
ONFIGURATION
The VL-EPMs-21 uses a shared-memory architecture. This allows the video controller to use 256
MB of system DRAM for video RAM.
The VL-EPMs-21 supports only one type of video output: LVDS Flat Panel Display.
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