Vantron IBOX66, User Manual

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3.16
MIPI DSI/LVDS
IBOX66 implements a dual-channel 8-lane MIPI DSI connector (2 × 16 × 2.0mm) to connect
an external screen via an extension cable, including 4 lanes that are multiplexed with LVDS.
Moreover, there is an LCD backlight power connector BL2 (1 x 6 x 2.0mm) that supplies
power to the LCD backlight.
MIPI DSI/LVDS pinout description:
Pin Signal Description
1 MIPI1_DSI_DN3
MIPI1_DSI Differential Lane 3 -
2 MIPI1_DSI_DP3 MIPI1_DSI Differential Lane 3 +
3 MIPI1_DSI_CLKN MIPI1_DSI Differential Clock Lane -
4
MIPI1_DSI_CLKP
MIPI1_DSI Differential Clock Lane +
5 GND Digital Ground
6 GND Digital Ground
7 MIPI1_DSI_DN2 MIPI1_DSI Differential Lane 2 -
8 MIPI1_DSI_DP2 MIPI1_DSI Differential Lane 2 +
9 MIPI1_DSI_DN1 MIPI1_DSI Differential Lane 1 -
10 MIPI1_DSI_DP1 MIPI1_DSI Differential Lane 1 +
11 MIPI1_DSI_DN0 MIPI1_DSI Differential Lane 0 -
12 MIPI1_DSI_DP0 MIPI1_DSI Differential Lane0 +
13 LVDS_MIPI0_DN3 LVDS/MIPI_DSI Differential Lane 3 -
14 LVDS_MIPI0_DP3 LVDS/MIPI_DSI Differential Lane 3 +
15 LVDS_MIPI0_CLKN LVDS/MIPI_DSI Differential Clock Lane -
16 LVDS_MIPI0_CLKP LVDS/MIPI_DSI Differential Clock Lane +
17 GND
Digital Ground
18 GND
Digital Ground
19 LVDS_MIPI0_DN2 LVDS/MIPI_DSI Differential Lane 2 -
20 LVDS_MIPI0_DP2 LVDS/MIPI_DSI Differential Lane 2 +
21 LVDS_MIPI0_DN1 LVDS/MIPI_DSI Differential Lane 1 -
22 LVDS_MIPI0_DP1 LVDS/MIPI_DSI Differential Lane 1 +
23 LVDS_MIPI0_DN0 LVDS/MIPI_DSI Differential Lane 0 -