BOLT
UDOO BOLT User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.B. - Reviewed by L.V. Copyright © 2019 SECO S.p.A.
42
3.3.13
Embedded Controller I/O Header
On board
’
s bottom sidem there is another dual row 40-pin p 2.54mm female header, which makes available
other signals for possible external expansions, that are directly managed by the Embedded Controller.
More specifically, on this connector will be available an SPI interface, a FAN Control interface, two I2C interfaces,
a Matrix scan interface and two UARTs, where some interfaces share the same pins. Most of
these signals can also be used as GPIOs.
Please notice that JTAG interface and Private Flash Interface, described below, are disabled to
the end-users, since they are reserved for manufacturing purposes.
Here following the description of the signals available on this connector:
EC_SPI_MOSI: EC
’
s SPI #0 interface Master Out Slave In output Signal, electrical level
+3.3V_DSW.
EC_SPI_MISO: EC
’
s SPI #0 interface Master In Slave Out input Signal, electrical level
+3.3V_DSW
EC_SPI_CS#: EC
’
s SPI #0 interface Chip Select active low output signal, electrical level
+3.3V_DSW
EC_SPI_CLK: EC
’
s SPI #0 interface Clock output, electrical level +3.3V_DSW
EC_NRST: EC
’
s JTAG interface Reset input signal, electrical level +3.3V_DSW with 10k
Ω
pull-
down resistor
EC_TDO_I2C_SCL2: EC
’
s JTAG interface Test Data Out output signal / I2C Port #9 Clock line.
Output signal, electrical level +3.V_DSW with 2k2
Ω
pull-up resistor.
EC_TDI_I2C_SDA2: : EC
’
s JTAG interface Test Data IN input signal / I2C Port #9 data line.
Bidirectional signal, electrical level +3.3V_DSW with 2k2
Ω
pull-up resistor.
EC_TMS_I2C_SCL1: EC
’
s JTAG interface Test Mode Select output signal / I2C Port #8 Clock
line. Output signal, electrical level +3.V_DSW with 2k2
Ω
pull-up resistor
EC_TCK_I2C_SDA1: EC
’
s JTAG interface Test Clock signal / I2C Port #8 data line. Bidirectional
signal, electrical level +3.3V_DSW with 2k2
Ω
pull-up resistor.
WAKE# EC Wake# capable Input Signal, electrical level +3.3V_DSW with 2k2
Ω
pull-up resistor
FANOUT0: EC PWM #0 Output Signal, electrical level +3.3V_DSW.
FANTACH0: EC FAN Tachometric #0 Input signal, electrical level +3.3V_DSW.
Embedded controller Feature header CN25
Pin Signal
Pin Signal
1
EC_SPI_MISO
2
EC_SPI_CS#
3
EC_SPI_MOSI
4
EC_SPI_CLK
5
EC_NRST
6
WAKE#
7
EC_TDO_I2C_SCL2
8
EC_TMS_I2C_SCL1
9
EC_TDI_I2C_SDA2
10
EC_TCK_I2C_SDA1
11
FANOUT0
12
FANTACH0
13
EC_KSO0
14
EC_KSI0
15
EC_KSO1
16
EC_KSI1
17
EC_KSO2
18
EC_KSI2
19
EC_KSO3
20
EC_KSI3
21
EC_KSO4
22
EC_KSI4
23
EC_KSO8_PVTIO0
24
EC_KSO11_PVTCS#
25
EC_KSO9_PVTIO1
26
EC_KSO12_PVTCLK
27
EC_KSO10_PVTIO2
28
EC_KSO13_PVTIO3
29
GND
30
+3.3V_OUT
31
GND
32
+3.3V_OUT
33
EC_UART_RxD1
34
EC_UART_RxD0
35
EC_UART_TxD1
36
EC_UART_TxD0
37
EC_UART_RTS#1
38
EC_UART_RTS#0
39
EC_UART_CTS#1
40
EC_UART_CTS#0
