NINA-W1 series - User Manual
Figure 31: GND plane guard area enclosing the NINA-W1x6 module
Figure 32: Size of the GND cut out for the NINA-W1x6 module’s PCB trace antenna
3.4
Data communication interfaces
3.4.1
Asynchronous serial interface (UART) design
The layout of the UART bus should be done so that noise injection and cross talk are avoided. It is
recommended to use the hardware flow control with RTS/CTS to prevent temporary UART buffer
overrun.
The flow control signals RTS/CTS are active low thus a 0 (ON state =low level) will allow the UART to
transmit.
