LEA-5, NEO-5, TIM-5H - Hardware Integration Manual
GPS.G5-MS5-09027-A2
Released
Hardware description
Page 22 of 68
1.6
I/O pins
1.6.1
RESET_N (LEA-5, TIM-5H)
As with ANTARIS 4 versions, LEA-5 and TIM-5H modules come equipped with a
RESET_N
pin. Driving
RESET_N
low activates a hardware reset of the system. Unlike ANTARIS 4 modules,
RESET_N
is not an I/O with u-blox 5. It
is only an input and will not reset external circuitry.
Use components with open drain output (i.e. with buffer or voltage supervisor
).
There is an internal pull up resistor of 3k3 to VCC inside the module that requires that the reset circuitry can
deliver enough current (e.g. 1mA).
Do not drive
RESET_N
high.
1.6.2
EXTINT0
EXTINT0
is an external interrupt pin with fixed input voltage thresholds independent of VCC (see the data sheet
for more information). Leave open if unused.
1.6.3
AADET_N (LEA-5, TIM-5H)
AADET_N
is an input pin and is used to report whether an external circuit has detected a external antenna or
not. Low means antenna has been detected. High means no external antenna has been detected.
See chapter 2.6.5 for an implementation example.
1.6.4
Configuration pins (LEA-5S/5A/5Q/5M, NEO-5)
ROM-based modules provide up to 3 pins (
CFG_COM0, CFG_COM1
,
CFG_GPS0
) for boot-time configuration.
These become effective immediately after start-up. Once the module has started, the configuration settings can
be modified with UBX configuration messages. The modified settings remain effective until power-down or
reset. If these settings have been stored in battery-backup RAM, then the modified configuration will be
retained, as long as the backup battery supply is not interrupted.
Some configuration pins are shared with other functions, e.g. SPI. During start-up, the module reads the state of
the configuration pins. Afterwards the other functions can be used.
For more information about settings and messages see the module data sheet.
