Spartan-3E FPGA Industrial Micromodule
User Manual
Rev
Date
Who
Description
1.04 2008-10-27
FDR
DIP switches
overview
1.05 2008-10-29
FDR
stacking height
1.06 2008-12-08
FDR
DIP switches
revised
1.07 2009-02-16
FDR
fixed DIP switches
overview picture
1.08 2009-03-09
FDR
clarified warning
regarding 3.3 V
power-rail
1.09 2009-03-16
FDR
fixed and improved
switch settings
1.10 2009-06-03
FDR
added “FWU File
Generation” section
1.11 2009-07-23
FDR
clarified
changes/LED
section
1.12 2009-08-24
FDR
added FPGA signal
details for main
user signals
1.13 2009-09-01
FDR
improved “On-
board Memories”
chapter
1.14 2009-09-03
FDR
improved clock,
memory and con-
figuration chapters
1.14 2009-10-23
FDR
PREPARE_FW de-
scription removed
1.15 2010-05-14
FDR
Added reference
design summaries.
1.16 2010-01-20
FDR
Fixed JTAG image.
1.17 2010-01-21
FDR
Fixed pin-out de-
scription for pin 57
(B0_L08_N). Add
note on offset hole
connectors.
1.18 2011-03-25
FDR
Updated Hirose
connectors part
numbers
1.19 2011-10-04
AIK
Updated diagrams
and ToC
Table 17: revision history.
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