Transition Networks
SGPAT10xx-x05 PoE+ Converter User Guide
33719 Rev. C
https://www.transition.com
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After that condition is met, ALPT enters the
Active
state. It remains in the Active state until the converter is
either powered down, or its SFP module is removed. In the Active state, Active LPT works as shown below (the
same as when regular LPT is enabled).
Energy Efficient Ethernet (EEE)
The SGPAT twisted pair ports support IEEE 802.3az Energy Efficient Ethernet for power saving.
Energy efficient
Ethernet can significantly reduce the power consumption of the device over a period of time especially when
there is a large amount of idle signals on the copper port. IEEE standard 802.3az which implements a Low Power
Idle mode on copper interfaces with internal PHYs. SGPAT TP Ports have the EEE Low Power Idle mode enabled.
Note that the Link LED remains lit when in low power mode.
The amount of delay experienced while waiting for the copper interfaces to wake up and come out of low power
idle mode is determined by the speed of the port:
Delay = ASSERT TIME + WAKE TIME
For 1000 Base, delay = 0 + 17us = 17us. For 100 Base, delay = 0 + 30us = 30us.
EEE Low Power Idle mode requires the copper port to advertise via the auto negotiation registers the ability to
support EEE for both 1000Base-T and 100Base-T. Both local and remote ports must indicate they can support
low power idle mode before the port can initiate a low power idle state.
During Auto –Negotiation the Port EEE capabilities are exchanged using the next page process to establish the
speed and duplex information. Timer information with regards to tx_idle, assert and wake cycles are set in
SGPAT registers by the CPU. When a port egress queue remains empty for a specific period of time set by the
EEE TX_IDLE Timer register, then a low power state can be entered. The default setting for the TX_IDLE is 2
milliseconds.
After the TX_IDLE time the PHY will start the assert timer. The Assert timer will require the SGPAT to wait until
the assert timer is zero before a wake up request can be processed. Currently the default Assert timer is set to 0,
giving the PHY the ability to immediately start processing a request to leave the low power idle state. The PHY
then enters low power idle mode. This mode is defined by a 22.35 millisecond quiet period followed by a 210
microsecond refresh pulse. Then once a port sends a packet and the egress queue is no longer empty a wake up
