Toshiba Tecra M4, Maintenance Manual

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2 Troubleshooting 2.4 System board Troubleshooting
2-26 [CONFIDENTIAL] TECRA M4 Maintenance Manual (960-521)
Table 2-3 Debug port (Boot mode) error status (5/10)
D port status Inspection items Details
F106h Initialization of devices which
need initialization before PCI
bus initialization PIT test (at Cold boot only) and initialization
Setting of test pattern to channel 0 of PIT#0
Check whether the set test pattern can be
read.
Initialization of PIT channel 0 (Setting of timer
interruption interval to 55ms)
Initialization of PIT channel 2(Setting of the
sound generator frequency to 664Hz)
Test of PIT channel 1 (Check whether the refresh
signal works properly in 30 micro-s refresh
interval.) The system halts when the time is out.
Test of PIT channel 2 (Check whether the
speaker gate works properly)
CPU clock measurement
Check of parameter block A
Permission of SMI except auto-off function
Control of excess of rated input power
Battery discharge current control (1CmA)
AC adapter rated over current control
Dividing procedures for time measuring by IRT
Setting for clock generator
Checking parameter tab lock A
CPU Initialization
Updating micro-code
Judging of CPU type
Geyserville support check
Setting of CPU clock to “high"
Saving memory configuration
to buffer
Reading of EC version
Update of flash ROM type
F107h
Judging of destination (Japan
or except Japan) based on
DMI data
CMOS default setting check Sets default setting if bad battery or bad
checksum (ROM, CMOS) is detected.
ACPI table initialization (for
execution of option ROM)