Circuit Operating Descriptions
7-31
4) FM DEMODULATOR
The FM demodulator consists of a stable mono multivibrator balanced modulator (BM) and a LPF. The FM
demodulator circuit first converts the FM signal to a pulse width modulator signal. Then the circuit smoothes the
PWM signal to demodulate the video signal. This demodulated signal is fed to the LPF to remove its FM carrier
component and any other harmonics. The demodulated luminance signal outputs from Pin 21 and is applied to
the 3MHz LPF through main deemphasis circuit. To reduce demodulation noise, the output of the 3MHz LPF is
applied to a non-linear deemphasis circuit through YNR circuit.
5) Main De-emphasis Circuit
Before modulation, main emphasis was performed. Because the high frequency components of video signal were
boosted more than the low frequency components in the recording mode, main deemphasis must be performed to
obtain a normal video signal. That is this circuit returns the emphasized high frequency component to the original
value.
6) Non Linear De-Emphasis Circuit
This circuit is the counter part of the dynamic pre-emphasis circuit during recording. The characteristics are also
the opposite of those in recording.
7) Drop Out Compensator/YNR Circuit
This circuit compensated for missing parts of the FM signal due to dust, dirt on the tape or irregular tape coating,
etc. The clamped video signal is supplied to the CCD 1H circuit. The 1H delayed video signal from CCD block is
also supplied to the 6MHz LPF to reject the sampling noise of CCD IC.
Then, the output of LPF is applied to Pin 34 of video IC. When the DOC detector detects the FM loss, a 1H
delayed video signal is added in place of the missing signal.
8) Noise Canceller Circuit
The noise canceller circuit removes the high frequency noise contained in the video signal which has the reverse
characteristics of the detail enhance in the recording mode. The output of the noise canceller circuit is supplied to
the Luminance and Chrominance mixer circuit. The mixed chroma and luminance signal are then output at Pin
26.
Summary of Contents for D-VR3SU
Page 3: ...CONTENTS ...
Page 4: ...MEMO ...
Page 10: ...Precautions 1 6 MEMO ...
Page 22: ...Reference Information 2 12 MEMO ...
Page 24: ...Product Specification 3 2 MEMO ...
Page 25: ...4 1 4 Operating Instructions ...
Page 88: ...5 22 Disassembly and Reassembly MEMO ...
Page 100: ...6 12 Alignment and Adjustments MEMO ...
Page 115: ...Circuit Operating Descriptions 7 15 Fig 7 12 IC601 Block Diagram ...
Page 148: ...Circuit Operating Descriptions 7 48 MEMO ...
Page 160: ...VCR Deck Operating Description 8 12 Fig 8 14 Mecha Timing Chart ...
Page 174: ...VCR Deck Operating Description 8 26 MEMO ...
Page 200: ...Exploded View and Parts List 10 8 MEMO ...
Page 216: ...11 16 Electrical Parts List MEMO ...
Page 217: ...1 1 SHIBAURA 1 CHOME MINATO KU TOKYO 105 8001 JAPAN ...