Checksum Functions
447
SNIU028A – February 2016 – Revised April 2016
Copyright © 2016, Texas Instruments Incorporated
Boot ROM and Boot Flash
13.6 Checksum Functions
The UCD3138 Boot ROM supports checksum generation, used primarily to verify programmed flash
memories. A PMBus command byte of 0xEF has been assigned for calculation of a checksum, while a
command byte of 0xEE is utilized for reading the previously calculated checksum.
13.6.1 Calculation of Checksum
The Boot ROM supports a function to calculate a checksum over a portion of the address space. The
PMBus Master initiates a PMBus write block message to initiate a checksum calculation within the
UCD3138. The PMBus master sends the device address, a command byte of 0xEF, the starting address
of the checksum calculation, the number of bytes to process and a PEC byte. Upon detection of the
command byte 0xEF, the Boot ROM reads the block of memory space and calculates a checksum. This
process requires less than 20 milliseconds for a 32K memory space.
Start
Device Address & R/W
(0x16)
Command Byte (0xEF)
Block Size (0x08)
Start Address[31:24]
Start Address[23:16]
Start Address[15:8]
Start Address[7:0]
Byte Count[31:24]
Byte Count[23:16]
Byte Count[15:8]
Byte Count[7:0]
PEC
Stop
13.6.2 Reading Checksum
The Boot ROM supports a function to read a previously calculated checksum over a portion of the address
space. The USB/PMBus adapter initiates a PMBus read block message to read a checksum calculation
within the UCD3138. The PMBus master sends the device address, a command byte of 0xEE. The
UCD3138 returns the four checksum bytes and a PEC byte. Upon detection of the command byte 0xEE,
the Boot ROM reads the calculated checksum and returns to the PMBus master.
Start
Device Address & R/W
(0x16)
Command Byte (0xEE)
Block Size (0x04)
Checksum[31:24]
Checksum[23:16]
Checksum[15:8]
Checksum[7:0]
PEC
Stop
13.7 Trim Flash Checksum Verification
The Boot ROM also initializes several trim registers in the UCD3138. This trim data comes from a special
trim flash area. The trim data is programmed into the trim flash when the device is tested. This trim flash
has its own checksum. It is very unlikely, but if the checksum is invalid, the Boot ROM will not write any
trim data to the registers. In this case, the device will not perform to specification. The Boot ROM provides
two forms of notification if the trim flash checksum is invalid:
1. In ROM mode, there will be a 1 at RAM location 0x19018. It is a 4 bit word, so a Read Word for that
address will return the value
2. In Flash mode, there will be a 0x7e written to the slave address bitfield for master mode in the PMBUS
registers. If the trim is valid, it will be a 0x7f.
The code below can be used in the flash code to detect if the trim flash is valid:
if(PMBusRegs.PMBCTRL1.bit.SLAVE_ADDR == 0x7f)
{
//here if trim is valid.
This way the power supply can start running if the trim is valid. If the trim is invalid, the power supply
should not be started, as the device will not be in specification. If there is host communication, the host
can be notified appropriately. The PMBus should still be functional. Note that one of the trim values is for
the PMBus bias to the ADC pins, so resistor based PMBus addressing using internal pull ups on ADC 0
and 1 may not give the proper address.