Texas Instruments TPS543320EVM User Manual Download Page 31

STANDARD TERMS FOR EVALUATION MODULES

1.

Delivery:

TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1

EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2

EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2

Limited Warranty and Related Remedies/Disclaimers

:

2.1

These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2

TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques

are

used

to

the

extent

TI

deems

necessary.

TI

does

not

test

all

parameters

of

each

EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3

TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

Summary of Contents for TPS543320EVM

Page 1: ...e 17 3 7 Synchronizing to a Clock 18 3 8 Start up and Shutdown with EN 19 3 9 Start up and Shutdown with VIN 20 3 10 Hiccup Current Limit 21 3 11 Overvoltage Protection 22 3 12 Thermal Performance 23...

Page 2: ...Performance Both 3 A Load 23 Figure 3 37 U2 Thermal Performance Both 3 A Load 23 Figure 4 1 Top Side Composite View 24 Figure 4 2 Bottom Side Composite View Viewed From Bottom 24 Figure 4 3 Top Layer...

Page 3: ...100 mm2 The second design is designed to demonstrate the high efficiency that can be achieved when designing with the TPS543320 regulator The second design also includes jumpers that can be used to ea...

Page 4: ...O 3 8 V Output voltage setpoint 1 8 V Output current range VIN 4 V to 18 V 0 3 A Line and load regulation VIN 4 V to 18 V IO 0 A to 3 A 0 1 Load transient response IO 0 75 A to 2 25 A Voltage change 7...

Page 5: ...A to 2 25 A Voltage change 200 mV Recovery time to within 0 5 28 s Loop bandwidth RO 1 32 J18 short pins 3 and 4 56 kHz Phase margin 48 degrees Input ripple voltage IO 3 A 130 mVPP Output ripple volt...

Page 6: ...ation 1 After changing R7 the feedfoward capacitor C8 can also need to be changed OUT FBT FBB REF V R R 1 V u 1 In the U2 design there are a few ways to set the output voltage First jumper J14 can be...

Page 7: ...n in Table 2 3 If the desired option is not available change one of the resistors to the value which sets the desired option In the U1 design change the MODE resistor to the value which sets the desir...

Page 8: ...ach connection With the maximum current limit setting the maximum load current capability is near 5 A before the TPS543320 goes into current limit Wire lengths must be minimized to reduce losses in th...

Page 9: ...ader to connect enable divider to U2 Remove shunt to float EN pin of U2 to use internal UVLO to enable U2 J14 VOUT Select U2 VOUT selection header Use shunt to set output voltage See Table 2 1 J15 ENS...

Page 10: ...e plot measurements TP23 EN_U2 U2 EN test point If you are applying an external voltage it must be kept below the absolute maximum voltage of the EN pin of 6 V TP24 VO_ADJ U2 Test point for injecting...

Page 11: ...500 and the efficiency measurement will include the power lost in this external resistance Remove the shunts from J11 and J13 as a small amount of power is dissipated in the EN resistor divider connec...

Page 12: ...1 2 4 2 7 3 50 55 60 65 70 75 80 85 90 95 100 VOUT 1 8 V VOUT 2 5 V VOUT 3 3 V VOUT 5 V VIN 12 V fSW 1000 kHz Figure 3 3 U2 Efficiency 1000 kHz Switching Frequency with Different Output Voltages Outpu...

Page 13: ...812 1 814 1 816 1 818 1 82 IOUT 0 A IOUT 1 5 A IOUT 3 A Figure 3 6 U1 Line Regulation IOUT A V OUT V 0 0 5 1 1 5 2 2 5 3 3 3 3 305 3 31 3 315 3 32 VIN 5 V VIN 12 V VIN 18 V Figure 3 7 U2 Load Regulat...

Page 14: ...sistors on the EVM provide a gain of 10 A V With this gain a 1 5 A step will result in 150 mV at the ISNS test point Note To use the load transient circuit with U1 move R27 to R28 Figure 3 11 and Figu...

Page 15: ...op Gain with Different Ramp Settings Frequency Hz Phase q 100 1000 10000 100000 1000000 200 150 100 50 0 50 100 150 200 Ramp 4 pF Ramp 2 pF Ramp 1 pF Figure 3 14 U2 Loop Phase with Different Ramp Sett...

Page 16: ...for U1 and TP29 for U2 Figure 3 15 U1 Output Ripple No Load Figure 3 16 U1 Output Ripple 3 A Load Figure 3 17 U2 Output Ripple No Load Figure 3 18 U2 Output Ripple 3 A Load Test Setup and Results www...

Page 17: ...1 and measured across C13 for U2 Figure 3 19 U1 Input Ripple No Load Figure 3 20 U1 Input Ripple 3 A Load Figure 3 21 U2 Input Ripple No Load Figure 3 22 U2 Input Ripple 3 A Load www ti com Test Setup...

Page 18: ...he EVM In this waveform after ten pulses the TPS543320 begins synchronizing to the clock After the clock goes away the TPS543320 switches at 70 of the internal clock frequency for four pulses then tra...

Page 19: ...internal LDO start up relative to the EN pin A shunt on the ENOFF_U1 jumper or RDIV_VIN can be used to test the EN start up of U1 and U2 respectively When the shunt is removed from ENOFF_U1 EN is rele...

Page 20: ...3320 shuts down when the input or EN pin voltage reach their respective UVLO threshold The rate at which VIN ramps down changes as soon as the TPS543320 is disabled because it is no longer loading the...

Page 21: ...an overload on the output The TPS543320 tries to restart after the Hiccup wait time period but the overload was still present on the output In the next restart attempt the overload has been removed so...

Page 22: ...ference voltage of 0 5 V and is stepped up to 3 3 V The TPS543320 attempts to restart immediately after the OVP fault is cleared It does not wait for the hiccup time period Figure 3 32 U2 Overvoltage...

Page 23: ...ak time was used before taking each measurement Figure 3 34 U1 Thermal Performance 3 A Load and U2 off Figure 3 35 U2 Thermal Performance 3 A Load and U1 off Figure 3 36 U1 Thermal Performance Both 3...

Page 24: ...D pins of the IC to help maximize the thermal performance Each TPS543320 circuit has its own dedicated ground are for quiet analog ground that is connected to the main power ground plane at a single p...

Page 25: ...ematic and Bill of Materials This section presents the TPS543320EVM schematic and bill of materials www ti com Schematic and Bill of Materials SLVUC07A DECEMBER 2020 REVISED MAY 2021 Submit Document F...

Page 26: ...schematic for U2 Figure 5 1 U1 Schematic Schematic and Bill of Materials www ti com 26 TPS543320 SWIFT Step Down Converter Evaluation Module User s Guide SLVUC07A DECEMBER 2020 REVISED MAY 2021 Submi...

Page 27: ...www ti com Schematic and Bill of Materials SLVUC07A DECEMBER 2020 REVISED MAY 2021 Submit Document Feedback TPS543320 SWIFT Step Down Converter Evaluation Module User s Guide 27 Copyright 2021 Texas I...

Page 28: ...4030 122MEB Coilcraft L2 1 3 3 H Shielded Power Inductor 3 3 H 20 7 8 A 14 6 mO max SMT_IND_5MM48_5MM28 XEL5050 332MEB Coilcraft LBL1 1 Thermal Transfer Printable Labels 0 650 W x 0 200 H 10 000 per r...

Page 29: ...TP17 TP19 TP20 TP33 8 Test Point Multipurpose Black TH Black Multipurpose Testpoint 5011 Keystone TP9 TP22 TP24 TP26 TP27 TP34 6 Test Point Multipurpose White TH White Multipurpose Testpoint 5012 Keys...

Page 30: ...nector SMBR004D00 JAE Electronics 6 Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Changes from Revision December 2020 to Revision A May...

Page 31: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 32: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 33: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 34: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 35: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 36: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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