Input Voltage (V)
L
in
e
Re
g
u
la
tio
n
(%)
6
8
10
12
14
16
18
20
22
24
26
28
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
D004
I
OUT
= 1 A
Output Current (A)
L
oa
d
Re
g
u
la
tio
n (
%)
0.1
0.6
1.1
1.6
2.1
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
D003
V
IN
= 24 V
V
IN
= 12 V
Test Setup and Results
6
SLVUAP3 – April 2016
Copyright © 2016, Texas Instruments Incorporated
TPS54202EVM-716 2-A Regulator Evaluation Module
2.3
Output Voltage Load Regulation
shows the load regulation for the TPS54202EVM-716.
Figure 3. TPS54202EVM-716 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4
Output Voltage Line Regulation
shows the line regulation for the TPS54202EVM-716.
Figure 4. TPS54202EVM-716 Line Regulation