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THERMAL PROTECTION

PRINTED-CIRCUIT BOARD (PCB) LAYOUT

TPA3124D2

SLOS578 – MAY 2008

........................................................................................................................................................................................................

www.ti.com

Thermal protection on the TPA3124D2 prevents damage to the device when the internal die temperature
exceeds 150

°

C. There is a ±15

°

C tolerance on this trip point from device to device. Once the die temperature

exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not
a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30

°

C. The device

begins normal operation at this point with no external system interaction.

Because the TPA3124D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit
board (PCB) should be optimized according to the following guidelines for the best possible performance.

Decoupling capacitors—The high-frequency 0.1-

µ

F decoupling capacitors should be placed as close to the

PVCC (pins 1, 3, 10, and 12) and AVCC (pins 19 and 20) terminals as possible. The VBYP (pin 7) capacitor
and VCLAMP (pin 11) capacitor should also be placed as close to the device as possible. Large (220-

µ

F or

greater) bulk power-supply decoupling capacitors should be placed near the TPA3124D2 on the PVCCL and
PVCCR terminals.

Grounding—The AVCC (pins 19 and 20) decoupling capacitor and VBYP (pin 7) capacitor should each be
grounded to analog ground (AGND, pins 8 and 9). The PVCCx decoupling capacitors and VCLAMP
capacitors should each be grounded to power ground (PGND, pins 13, 14, 23, and 24). Analog ground and
power ground should be connected at the thermal pad, which should be used as a central ground connection
or star ground for the TPA3124D2.

Output filter—The reconstruction filter (L1, L2, C9, and C16) should be placed as close to the output terminals
as possible for the best EMI performance. The capacitors should be grounded to power ground.

Thermal pad—The thermal pad must be soldered to the PCB for proper thermal performance and optimal
reliability. The dimensions of the thermal pad and thermal land are described in the mechanical section at the
back of the data sheet. See TI Technical Briefs

SLMA002

and

SLOA120

for more information about using the

thermal pad. For recommended PCB footprints, see figures at the end of this data sheet.

For an example layout, see the TPA3124D2 Evaluation Module (TPA3124D2EVM) User Manual, (

SLOU189

).

Both the EVM user manual and the thermal pad application note are available on the TI Web site at

http://www.ti.com

.

18

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Copyright © 2008, Texas Instruments Incorporated

Product Folder Link(s):

TPA3124D2

Summary of Contents for TPA3124D2

Page 1: ...ion The TPA3124D2 can drive stereo speakers as low as 4 Required The efficiency of the TPA3124D2 eliminates the need Single Ended Analog Inputs for an external heat sink when playing music Thermal and...

Page 2: ...TTL logic levels with compliance to AVCC BSL 21 I O Bootstrap I O for left channel PVCCL 1 3 P Power supply for left channel H bridge not internally connected to PVCCR or AVCC LOUT 22 O Class D H brid...

Page 3: ...ommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability PACKAGE 1 2 TA 25 C DERATING FACTOR TA 70 C TA 85 C 24 pin...

Page 4: ...VI 1 Vrms 80 dB TA 25 C VCC 24 V RL 8 unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC 24 Vripple 200 mVPP 100 Hz 48 ksvr Supply ripple rejection dB Gain 20 dB 1 kHz 52 Output po...

Page 5: ...L VCLAMP BSR PVCCR ROUT PGNDR VCLAMP AVDD AVDD AVDD 2 AVDD AVDD AVDD 2 REGULATOR AGND CONTROL BIAS THERMAL MUTE CONTROL AV CONTROL SC DETECT SC DETECT LS HS VCLAMP TPA3124D2 www ti com SLOS578 MAY 200...

Page 6: ...0 001 10 20k 0 1 G003 1 PO 2 5 W 0 01 PO 1 W f Frequency Hz 20 VCC 24 V RL 8 SE Gain 20 dB 100 1k 10k THD N Total Harmonic Distortion Noise 0 001 10 20k 0 1 G004 1 PO 1 W PO 5 W 0 01 PO 2 5 W TPA3124D...

Page 7: ...W Gain 20 dB PO Output Power W 0 01 RL 8 SE Gain 20 dB 0 1 1 10 THD N Total Harmonic Distortion Noise 0 001 0 01 10 40 0 1 G007 1 VCC 12 V VCC 18 V VCC 24 V TPA3124D2 www ti com SLOS578 MAY 2008 TYPIC...

Page 8: ...Gain VCC 24 V RL 4 SE Gain 20 dB Lfilt 22 H Cfilt 0 68 F Cdc 1000 F f Frequency Hz Phase 20 100 1k 100k 10k G012 600 500 400 300 200 100 0 100 200 0 5 10 15 20 25 30 35 40 Gain dB Phase Gain VCC 24 V...

Page 9: ...utput Power W 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 Efficiency G016 VCC 18 V RL 8 SE Gain 20 dB VCC 24 V TPA3124D2 www ti com SLOS578 MAY 2008 TYPICAL CHARACTERISTICS continued All tests ar...

Page 10: ...30 20 10 0 f Frequency Hz Power Supply Rejection Ratio dB G025 20 100 1k 10k 20k VCC 24 V VO ripple 0 2 VPP RL 8 SE Gain 20 dB TPA3124D2 SLOS578 MAY 2008 www ti com TYPICAL CHARACTERISTICS continued...

Page 11: ...8 BTL Gain 20 dB PO Output Power W 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 Efficiency G024 RL 8 BTL Gain 20 dB VCC 24 V TPA3124D2 www ti com SLOS578 MAY 2008 TYPICAL CHARACTERISTICS continue...

Page 12: ...t varies between positive and negative VCC where filtered 50 duty cycle yields 0 V across the load The class D modulation scheme with voltage and current waveforms is shown in Figure 25 and Figure 26...

Page 13: ...to be dependent on the gain setting The actual gain settings are controlled by ratios of resistors so the gain variation from part to part is small However the input impedance from part to part at the...

Page 14: ...sitive side of the capacitor should face the amplifier input in most applications as the dc level there is held at 2 V which is likely higher than the source dc level Note that it is important to conf...

Page 15: ...target different types of noise on the power supply leads For higher frequency transients spikes or digital hash on the line a good low equivalent series resistance ESR ceramic capacitor typically 0...

Page 16: ...TPA3124D2 SLOS578 MAY 2008 www ti com Figure 29 PSRR Without AVCC Filter Figure 30 PSRR With AVCC Filter Figure 31 Application Schematic with 220 220 F AVCC Filter The half H bridge output stages use...

Page 17: ...low causes the outputs to mute and the amplifier to enter a low current state Never leave SHUTDOWN unconnected because amplifier operation would be unpredictable For the best power up pop performance...

Page 18: ...the TPA3124D2 on the PVCCL and PVCCR terminals Grounding The AVCC pins 19 and 20 decoupling capacitor and VBYP pin 7 capacitor should each be grounded to analog ground AGND pins 8 and 9 The PVCCx deco...

Page 19: ...utdown Control Mute Control 10 F m 22 H m 470 F m 0 68 F m TPA3124D2 PVCCL 1 SD 2 PVCCL 3 MUTE 4 LIN 5 RIN 6 BYPASS 7 AGND 8 AGND 9 PVCCR 10 VCLAMP 11 PVCCR 12 PGNDR 13 PGNDR 14 ROUT 15 BSR 16 GAIN1 1...

Page 20: ...analyzer in one package The generator output and amplifier input must be ac coupled However the EVMs already have the ac coupling capacitors CIN so no additional coupling is required The generator out...

Page 21: ...20 Hz 20 kHz RL b Traditional Class D Class D APA Signal Generator Power Supply RL Lfilt Cfilt TPA3124D2 www ti com SLOS578 MAY 2008 Figure 34 Audio Measurement Systems Copyright 2008 Texas Instrumen...

Page 22: ...r to an amplifier input output The generator should have unbalanced outputs and the signal should be referenced to the generator ground for best results Unbalanced or balanced outputs can be used when...

Page 23: ...d have balanced outputs and the signal should be balanced for best results An unbalanced output can be used but it may create a ground loop that affects the measurement accuracy The analyzer must also...

Page 24: ...Package Type Package Drawing Pins SPQ Reel Diameter mm Reel Width W1 mm A0 mm B0 mm K0 mm P1 mm W mm Pin1 Quadrant TPA3124D2PWPR HTSSOP PWP 24 2000 330 0 16 4 6 95 8 3 1 6 8 0 16 0 Q1 PACKAGE MATERIA...

Page 25: ...ns are nominal Device Package Type Package Drawing Pins SPQ Length mm Width mm Height mm TPA3124D2PWPR HTSSOP PWP 24 2000 350 0 350 0 43 0 PACKAGE MATERIALS INFORMATION www ti com 26 Feb 2019 Pack Mat...

Page 26: ...W This image is a representation of the package family actual package may vary Refer to the product data sheet for package details TSSOP 1 2 mm max height TM PowerPAD PWP 24 PLASTIC SMALL OUTLINE 4 4...

Page 27: ...ters Any dimensions in parenthesis are for reference only Dimensioning and tolerancing per ASME Y14 5M 2 This drawing is subject to change without notice 3 This dimension does not include mold flash p...

Page 28: ...TM NOTES continued 6 Publication IPC 7351 may have alternate designs 7 Solder mask tolerances between and around signal pads can vary based on board fabrication site 8 This package is designed to be...

Page 29: ...NG STENCIL THICKNESS NOTES continued 10 Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release IPC 7525 may have alternate design recommendations 11 Board as...

Page 30: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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