SPRZ200E
TMS320VC5509A Silicon Errata
28
3.12
Power Management Advisories
Repeated Interrupts During CLKGEN Domain Idle
Advisory PM_1
Revision(s) Affected:
1.0 and 1.1
Details:
Any external interrupt staying low for an extended period should generate only one interrupt.
The interrupt signal should normally be required to go high, then low again before additional
interrupts would be generated. However, on the 5509A, if the external interrupt stays low while
the CLKGEN domain enters the idle state, the associated interrupt flag is set again. This
causes the CPU to exit the idle state, and if the associated interrupt enable bit is set, the
interrupt service routine will also be executed.
In case of CLKGEN in idle and the external interrupt is driven low to wake up the CPU,
repeated interrupt will be generated until the external interrupt signal driven high after the CPU
wakes up.
When the CPU is not in idle, the interrupt responds as expected (only a single interrupt is
generated).
Assembler Notification:
None
Workaround:
Limit the low pulse durations of external interrupts so that they are not still asserted when the
CLKGEN goes into idle or when waking up the CPU from idle.
