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Texas Instruments TL5001EVM-097, User Manual

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Texas Instruments TL5001EVM-097 User Manual Download Page 11

 Board Layout

1-5

 Hardware

1.4

Board Layout

Figures 1–4 through 1–6 show the SLVP097 board layout.

Figure 1–4. Board Layout

Q1

SLVP097
3.3/5V, 2.5 AMP
Rev. A.1 1997

R4

L1

J1
IN

J2

C9

U2

.330

C5

+

+

C7

C6

C4

R1

CR1

R3
R2

1.0

C10

R8

1

C2

JP1

C1

+

C8

C3

U1

R6

R7

R5

C1

1

C12

1

OUT

C13

1–2 = 5V
2–3 = 3.3V

1

1.6”

2.4”

Figure 1–5. Top Layer

1.6”

2.4”

Summary of Contents for TL5001EVM-097

Page 1: ...TL5001EVM 097 3 3ĆV 5ĆV Selectable Output 2 5ĆA Buck Converter Module 2001 Mixed Signal Linear Products User s Guide SLVU002B ...

Page 2: ...design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such products or services might be or are used TI s publication of information regarding any third party s products or services does not constitut...

Page 3: ...re requirements Chapter 2 describes design considerations and procedures Related Documentation From Texas Instruments The following books describe the TL5001 and related support tools To obtain a copy of any of these TI documents call the Texas Instruments Literature Response Center at 800 477 8924 When ordering please identify the book by its title and literature number TL5001 Pulse Width Modulat...

Page 4: ...rite to Texas Instruments Incorporated MSP Marketing Documentation Correction MS 8710 P O Box 660199 Dallas Texas 75266 0199 Notes 1 The literature number for the book is required see the lower right corner on the back cover 2 Please mention the full title of the book the literature number from the lower right corner of the back cover and the publication date from the spine or front cover FCC Warn...

Page 5: ...ons 1 4 1 4 Board Layout 1 5 1 5 Bill of Material 1 7 1 6 Test Results 1 8 2 Design Procedure 2 1 2 1 Introduction 2 2 2 2 Operating Specifications 2 3 2 3 Design Procedures 2 4 2 3 1 Duty Cycle Estimate 2 4 2 3 2 Output Filter 2 4 2 3 3 Power Switch 2 4 2 3 4 Rectifier 2 5 2 3 5 Snubber Network 2 5 2 3 6 Controller Functions 2 5 2 3 7 Loop Compensation 2 6 ...

Page 6: ...5 1 5 Top Layer 1 5 1 6 Bottom Layer 1 6 1 7 Output Voltage Vs Output Current 3 3 V Mode 1 8 1 8 Output Voltage Vs Output Current 5 V Mode 1 8 1 9 Output Voltage Vs Supply Voltage 3 3 V Mode 1 9 1 10 Output Voltage Vs Supply Voltage 5 V Mode 1 9 1 11 Efficiency Vs Output Current 5 V Mode 1 10 2 1 Power Stage Response 2 7 2 2 Required Compensation Response 2 7 ...

Page 7: ...ontroller coupled with a TPS2817 MOSFET driver This manual explains how to construct basic power conversion circuits including the design of the control chip functions and the basic loop This chapter includes the following topics Topic Page 1 1 Introduction 1 2 1 2 Schematic 1 3 1 3 Input Output Connections 1 4 1 4 Board Layout 1 5 1 5 Bill of Materials 1 7 1 6 Test Results 1 8 Chapter 1 ...

Page 8: ...ernal reference voltage and adjusts the width of the power switch Q1 on time A commutating diode CR1 maintains continuous current through the inductor when the power switch is turned off Figure 1 1 Typical Buck Converter Block Diagram Controller FB R1 R2 Q1 R3 CR1 C2 C1 VO VI L1 The SLVP097 buck converter uses the TI TL5001 PWM controller and the TPS2817 MOSFET driver to give a 0 to 2 5 A output w...

Page 9: ...C 3 6 R3 1 C12 C11 1000 pF 047µ F C9 0 1µ F C8 0 1µ F R4 C13 0 018µ F R6 1 R7 1 2 3 1 R8 1 JP1 1 2 5 V 2 3 3 3 V R8A CW CCW W Adjustable Output Replace JP1 and R8 VO 1 36 5 V 1 0 kΩ 47 kΩ 1 8 kΩ 1 00 kΩ 330 Ω 4 02 kΩ 30 1 kΩ 732 Ω 22 Ω µ F 1 C10 Notes 1 Frequency set to 275 kHz by R3 2 This unit and the components are thermally rated to 2 5 A The output current should not exceed 2 5 A unless prope...

Page 10: ... 1997 R4 L1 J1 IN J2 C9 U2 LOAD Power Supply 330 C5 C7 C6 C4 R1 CR1 R3 R2 1 0 C10 R8 1 C2 JP1 C1 C8 C3 U1 R6 R7 R5 C11 C12 1 OUT C13 1 2 5 V 2 3 3 3 V Notes 1 The input power supply should be rated at least 3 A with current limit set high enough for proper operation 2 The load should be rated at least 2 5 A with proper power dissipation Fixed or variable resistors may be used ...

Page 11: ...h 1 6 show the SLVP097 board layout Figure 1 4 Board Layout Q1 SLVP097 3 3 5V 2 5 AMP Rev A 1 1997 R4 L1 J1 IN J2 C9 U2 330 C5 C7 C6 C4 R1 CR1 R3 R2 1 0 C10 R8 1 C2 JP1 C1 C8 C3 U1 R6 R7 R5 C11 C12 1 OUT C13 1 2 5V 2 3 3 3V 1 1 6 2 4 Figure 1 5 Top Layer 1 6 2 4 ...

Page 12: ...Board Layout 1 6 Figure 1 6 Bottom Layer 1 6 2 4 ...

Page 13: ...0 047 mF 50 V 1206 C13 Capacitor Ceramic 0 018 mF 50 V 1206 CR1 30WQ04FN IR Diode Schottky 3 3 A 40 V D Pak J1 Header 4 pin 0 025 sq 0 100 centers J2 Header 4 pin 0 025 sq 0 100 centers JP1 Header 3 pin 0 025 sq 0 100 centers L1 SLF12565 330M2R8 TDK Inductor 33 mH 2 8 A 0 041 W 0 50 square Q1 IRF7406 MOSFET P Ch 30 V 0 045 W 4 7 A SO 8 R1 Resistor CF 22 W 1 10 W 5 1206 R2 Resistor CF 47 kW 1 10 W ...

Page 14: ... V Mode 3 3 3 25 3 2 3 15 0 0 5 1 1 5 Output Voltage V 3 35 3 4 OUTPUT VOLTAGE vs OUTPUT CURRENT 3 3 V MODE 3 45 2 2 5 3 IO Output Current A V O VCC 9 V Figure 1 8 Output Voltage Vs Output Current 5 V Mode 5 4 95 4 9 4 85 0 1 5 05 5 1 OUTPUT VOLTAGE vs OUTPUT CURRENT 5 V MODE 5 15 2 3 IO Output Current A Output Voltage V V O 0 5 1 5 2 5 VCC 9 V ...

Page 15: ...PUT VOLTAGE vs SUPPLY VOLTAGE 3 3 V MODE 3 26 11 12 13 Output Voltage V V O VCC Supply Voltage V IO 0 25 A IO 2 5 A Figure 1 10 Output Voltage Vs Supply Voltage 5 V Mode 4 905 4 9 4 895 4 89 5 6 7 8 9 10 4 91 4 915 OUTPUT VOLTAGE vs SUPPLY VOLTAGE 5 V MODE 4 92 11 12 13 Output Voltage V V O VCC Supply Voltage V IO 0 25 A IO 2 5 A ...

Page 16: ...st Results 1 10 Figure 1 11 Efficiency Vs Output Current 5 V Mode 5 V 87 85 82 80 0 0 5 1 1 5 Efficiency 89 92 EFFICIENCY vs OUTPUT CURRENT 93 2 2 5 91 90 88 86 84 83 81 IO Output Current A 3 3 V VCC 9 V ...

Page 17: ...ntains all of the circuitry necessary to drive large MOSFETs in cluding a voltage regulator for higher voltage applications This section ex plains how to construct basic power conversion circuits including the design of the control chip functions and the basic loop This chapter includes the fol lowing topics Topic Page 2 1 Introduction 2 2 2 2 Operating Specifications 2 3 2 3 Design Procedure 2 4 ...

Page 18: ... V output at up to 2 5 A with an input voltage range of 5 5 V to 12 V The controller is a TL5001 PWM operating at a nominal frequency of 275 kHz The TL5001 is configured for a maximum duty cycle of 100 percent and has short circuit protection built in Output voltage selection is implemented with jumper JP1 ...

Page 19: ...SLVP097 Table 2 1 Operating Specifications Specification Min Typ Max Units Input Voltage Range 4 5 12 6 V Output Voltage Range 5 V Mode 4 7 5 0 5 3 V 3 3 V Mode 3 1 3 3 3 5 V Output Current Range 0 2 6 A Operating Frequency 275 kHz Output Ripple 50 mV Efficiency 85 90 For 3 3 V only minimum input voltage for 5 V output is 5 5 V ...

Page 20: ...d output load DI O 2 0 06 I O 2 0 06 2 5 0 30 A The inductor value is L V I V SAT V O D t DI O 12 0 1 3 3 0 32 ǒ3 63 10 6Ǔ 0 30 33 3 mH Assuming that all of the inductor ripple current flows through the capacitor and the effective series resistance ESR is zero the capacitance needed is C DI O 8 f ǒDV O Ǔ 0 3 8 ǒ275 103Ǔ 0 05 2 73 mF Assuming the capacitance is very large the ESR needed to limit th...

Page 21: ...s to optimize the network but as a starting point select a snubber capacitor with a value that is 4 10 times larger than the estimated capacitance of the catch rectifier The 30WQ04 has a capacitance of 110 pF resulting in a snubber capacitor of 1000 pF Then measuring a ringing time constant of 20 ns R is R 20 10 9 C 20 10 9 1000 10 12 20 W A 22 Ω resistor is used in the design 2 3 6 Controller Fun...

Page 22: ...ficient bandwidth must be designed into the circuit to assure that the converter has good transient response Both of these requirements are met by adding compensation components around the error amplifier to modify the total loop response The first step in design of the loop compensation network is the design of the output sense divider This sets the output voltage and the top resistor determines ...

Page 23: ...id Frequency Hz Phase Degrees Dashed Figure 2 2 shows the required error amplifier compensation response Figure 2 2 Required Compensation Response 10 102 103 104 20 15 0 5 25 35 BODE PLOT 40 30 5 10 10 70 90 30 70 90 50 50 Gain dB Solid Frequency Hz Phase Degrees Dashed 10 30 105 This response can be met with the following A pole at zero to give high dc gain Two zeroes at 1 87 kHz to cancel the LC...

Page 24: ...4365 at 20 kHz R5 and C12 provide this pole R6 is already chosen as 4 kW Calculate C12 as C12 C11 1 2p f R6 Required Gain In practice C12 is much greater than C11 therefore C12 1 2p 20 kHz 4 kW 0 04365 0 045 mF Use C12 0 047 mF R4 provides the first zero at the LC break point R4 1 2p 1 87 kHz C12 1 89 kW Use R4 1 8 kW C13 provides the other zero at the LC break point C13 1 1 87 kHz 1 20 kHz 2p R6 ...

Page 25: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments TL5001EVM 097 DC DC CONV ...

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