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IVA2.2 Subsystem Register Manual
Table 5-116. Register Call Summary for Register UCARBD
IVA2.2 Subsystem Basic Programming Model
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IVA2.2 Subsystem Register Manual
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Table 5-117. L2WBAR
Address Offset
0x0000 4000
Physical address
0x0184 4000
Instance
IVA2.2 GEMXMC
Description
L2 block writeback base address
Type
W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
ADDR
Bits
Field Name
Description
Type
Reset
31:0
ADDR
Block base address
W
0x--------
Table 5-118. Register Call Summary for Register L2WBAR
IVA2.2 Subsystem Basic Programming Model
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IVA2.2 Subsystem Register Manual
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Table 5-119. L2WWC
Address Offset
0x0000 4004
Physical address
0x0184 4004
Instance
IVA2.2 GEMXMC
Description
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
WC
Bits
Field Name
Description
Type
Reset
31:16
Reserved
Write 0s for future compatibility. Read returns 0.
RW
0x0000
15:0
WC
Number of 32-bit words in the block
RW
0x0000
Table 5-120. Register Call Summary for Register L2WWC
IVA2.2 Subsystem Basic Programming Model
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IVA2.2 Subsystem Register Manual
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837
SWPU177N – December 2009 – Revised November 2010
IVA2.2 Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated