Public Version
Display Subsystem Functional Description
www.ti.com
In automatic mode, the BTA is sent automatically at the end of short or long packets when respectively the
DSS.
[2] BTA_SHORT_EN or the DSS.
[3] BTA_LONG_EN bits are set to
1.
NOTE:
If the DSS.
[2] BTA_SHORT_EN bit is enabled, users can still set the
[6] BTA_EN bit. Only one BTA is sent to the peripheral and the
[6] BTA_EN bit is reset by hardware.
If the DSS.
[3] BTA_LONG_EN bit is enabled, users can still set the
[6] BTA_EN bit. Only one BTA is sent to the peripheral and the
[6] BTA_EN bit is reset by hardware.
If the DSS.
[2] BTA_SHORT_EN and DSS.
BTA_LONG_EN bits are both enabled, users can still set the DSS.
BTA_EN bit to send a BTA. Only one BTA is sent and the DSS.
[6] BTA_EN
bit is reset by hardware.
As explained previously, two modes can be used for each VC ID:
•
Automatic: After each packet, a bus turn-around is sent. To determine the size of the long packet, the
protocol engine on the host side should read the word count defined in the header (in
DSS.
register) and use it to determine the last data to be sent on
the DSI link. For short packets, the size is always 4 bytes. Then the bus turn-around is sent to the
peripheral. The word count is also used to determine how many bytes should be transferred from the
32-bit writes access to the payload register (DSS.
register).
•
Manual: In case of data transfer using the L4 interconnect port, while all data have been provided to
the DSI protocol engine, users can select bus turn-around for the last packet provided to the L4
interconnect port only by setting the bus turn-around enable bit (DSS.
[6] BTA_EN) or
for last packets and following ones by setting the automatic mode; in case of data transfer using the
video port, the bus turnaround enable bit (DSS.
[6] BTA_EN) can be selected at any
time during the transfer of the packet. In case of video mode packets (data and synchronization
events) users cannot determine when the BTA is sent relatively the video mode packets, so it is highly
recommended to use manual BTA mode only for packets generated in command mode but it is
possible to use BTA when for a VC in video mode. In case of data provided on the video port, an
interrupt for end of packet transfer (PACKET_SENT_IRQ) is provided to indicate users when the
packet has been completely sent by the DSI complex I/O. The PACKET_SENT_IRQ can be monitored
in
[2] PACKET_SENT_IRQ status bit. Users can request BTA even if the space
allocated in the TX FIFO for the corresponding VC is empty. It can be sent later on even if there was
no packet sent before BTA request. The DSS.
[6] BTA_EN bit should be reset by
hardware if the BTA request has been sent even if the automatic mode for this specific type of packets
is enabled.
The bus turnaround is supported for video mode packets and for command mode packets. It is not
possible to send BTA during the blanking periods of the video mode when HS blanking packets should be
sent, that is, when one of the following bits is set to 1:
•
DSS.
[20] BLANKING_MODE
•
DSS.
[21] HFP_BLANKING_MODE
•
DSS.
[22] HBP_BLANKING_MODE
•
DSS.
[23] HSA_BLANKING_MODE
Therefore, in video mode, the BTA request is delayed until there is a blanking period without HS blanking
packets.
TA Timer
When TurnRequest signal is asserted (always only for data lane #1), the TA_TO timer is started. If the
direction signal is no changed according to the turn-around request, the TA_TO interrupt is generated.
When the Direction signal is in output mode, any data on the input data bus should be ignored since the
DSI is in transmission mode (data and triggers should be ignored). See
for more details
on the TA_TO timer.
1680
Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated