Timer started
DSI_TIMING1[15] FORCE_TX_STOP_MODE_IO = 0x1
RESET
DSI_TIMING1[15] FORCE_TX_STOP_MODE_IO = 0x0
Or
Time out
De-assertion
dss-172
Public Version
Display Subsystem Functional Description
www.ti.com
Figure 7-96. ForceTxStopMode FSM
The DSI protocol engine asserts ForceTxStopMode by setting the DSS.
FORCE_TX_STOP_MODE_IO bit to 1. Asserting the FORCE_TX_STOP_MODE_IO bit allows to initialize
the lanes. The lanes are in the Stop State when ForceTxStopMode signal is high.
No data can be sent before the ForceTxStopMode signal is deasserted. The deassertion time is defined
by the STOP_STATE_COUNTER_IO, Stop_State_x4_IO, Stop_State_x16_IO field
[15:0].
The FORCE_TX_STOP_MODE_IO bit is reset by hardware when the time is reached.
This bit can be reset by software.
The calculation of the number of DSI_FCLK cycles assertion period is defined by:
Total period in DSI_FCLK cycles =
[12:0] STOP_STATE_COUNTER_IO x
((
[14] STOP_STATE_X16_IO x 15) + 1) x ((
[13] STOP_STATE_X4_IO x 3)
+ 1)
7.4.3.7.3 TurnRequest FSM
The signal TurnRequest is used to request turnaround. It is only valid for the data lane #1 since the other
data lanes cannot be used in the reverse direction to receive data from the DSI receiver.
describes the TurnRequest FSM to assert/deassert TurnRequest signal.
1676
Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
