Texas Instruments OMAP36 Series, Technical Reference Manual

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IVA2.2 Subsystem Register Manual
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5.5.13 iLF Registers
This section provides information about the improved Loop Filter module. Each register in the module is
described separately below.
5.5.13.1 iLF Register Mapping Summary
Table 5-751. iLF Register Mapping Summary
Register Name Type Register Address Offset Physical Address
Width
(Bits)
iLF_REVISION R 32 0x0000 0000 0x000A 1000
iLF_SYSCONFIG RW 32 0x0000 0010 0x000A 1010
iLF_SYSSTATUS R 32 0x0000 0014 0x000A 1014
iLF_PROGRAMBUFFERLINENLSBi
(1)
RW 32 0x0000 0040 + (0x8*i) 0x000A 1040 + (0x8*i)
iLF_PROGRAMBUFFERLINENMSBi
(1)
RW 32 0x0000 0044 + (0x8*i) 0x000A 1044 + (0x8*i)
iLF_PARAMETERSTACKUPj
(2)
RW 32 0x0000 0440 + (0x4*j) 0x000A 1440 + (0x4*j)
iLF_PARAMETERSTACKLWk
(3)
RW 32 0x0000 0460 + (0x4*k) 0x000A 1460 + (0x4*k)
iLF_EFPTABLEENTRYl
(4)
RW 32 0x0000 04C0 + (0x4*l) 0x000A 14C0 + (0x4*l)
iLF_INOUTBUFFERm
(5)
RW 32 0x0000 0550 + (0x4*m) 0x000A 1550 + (0x4*m)
iLF_CPUSTATUSREG R 32 0x0000 05F0 0x000A 15F0
iLF_IRQLOG R 32 0x0000 05F4 0x000A 15F4
iLF_EFPTD R 32 0x0000 05F8 0x000A 15F8
iLF_CONFIGREG RW 32 0x0000 05FC 0x000A 15FC
iLF_PARSEDDATAREG0 RW 32 0x0000 0600 0x000A 1600
iLF_PARSEDDATAREG1 RW 32 0x0000 0604 0x000A 1604
iLF_PARSEDDATAREG2 RW 32 0x0000 0608 0x000A 1608
iLF_INSTBUFFER_ADDRESS RW 32 0x0000 060C 0x000A 160C
iLF_LINESFILTERPROTOTYPES R 32 0x0000 0610 0x000A 1610
iLF_CLIPLIMITSENTRYn
(6)
R 32 0x0000 0614 + (0x4*n) 0x000A 1614 + (0x4*n)
iLF_COMMANDREG W 32 0x0000 0FFC 0x000A 1FFC
(1)
i = 0 to 127
(2)
j = 0 to 7
(3)
k = 0 to 23
(4)
l = 0 to 35
(5)
m = 0 to 39
(6)
n = 0 to 3
1068 IVA2.2 Subsystem SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated