and
-The SVSH/SVMH module is configured to transition from Normal mode to an OFF
state when moving from Active/LPM0/LPM1 into LPM2/LPM3/LPM4 modes. The affected
SVSMHCTL register settings are shaded in the following table.
Workaround
Any write to the SVSMxCTL register must be followed by a settling delay
(PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0) before entering LPM2,
LPM3, LPM4.
and
1. Ensure the SVSx, SVMx are configured to prevent the issue from occurring by the
following:
- Configure the SVSL module for slow wake up (SVSLFP = 0). Note that this will increase
the wakeup time from LPM2/3/4 to twakeupslow (~150 us).
or
- Do not configure the SVSH/SVMH such that the modules transition from Normal mode
to an OFF state on LPM entry and ensure SVSH/SVMH is in manual mode. Instead
force the modules to remain ON even in LPMx. Note that this will cause increased power
consumption when in LPMx.
Refer to the MSP430 Driver Library(
) for proper PMM configuration
functions.
Use the following function, PMM15Check (void), to determine whether or not the existing
PMM configuration is affected by the erratum. The return value of the function is 1 if the
Advisory Descriptions
18
MSP430F6720A Microcontroller
SLAZ657S – FEBRUARY 2015 – REVISED MAY 2021
Copyright © 2021 Texas Instruments Incorporated
