Texas Instruments MSP430F4132IPM, Manual

Page: 8 / 83

MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
8
POST OFFICE BOX 655303

DALLAS, TEXAS 75265
Terminal Functions (continued)
TERMINAL
NO.
I/O DESCRIPTION
NAME
64
PIN
48
PIN
I/O DESCRIPTION
P5.3/R03 40 29 I/O
General-purpose digital I/O pin
input port of the fourth most positive analog LCD level (V1)
P5.4/COM3 39 28 I/O
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
P5.5/COM2 38 27 I/O
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
P5.6/COM1 37 26 I/O
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
P5.7/COM0 36 25 I/O
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
P6.0/TA1.2/A2
†
/
CA4
63 47 I/O
General-purpose digital I/O pin
Timer1_A5, compare: Out2 output
ADC10 analog input A2
†
Comparator_A input 4
P6.1/
UCB0SOMI
†
/
UCB0SCL
†
1 1 I/O
General-purpose digital I/O pin
USCI B0 slave out/master in in SPI mode, SCL I
2
C clock in I
2
C mode
†
P6.2/
UCB0SIMO
†
/
UCB0SDA
†
2 2 I/O
General-purpose digital I/O pin
USCI B0 slave in/master out in SPI mode, SDA I
2
C data in I
2
C mode
†
P6.3/UCB0STE/
UCA0CLK/A3/
CA5/V
eref--
/V
ref--
3 -- I/O
General-purpose digital I/O pin
USCI B0 slave transmit enable/USCI A0 clock input/output
ADC10 analog input A3 / negative reference
Comparator_A input 5
P6.4/UCB0CLK/
UCA0STE/A4/
CA6/V
eref+
/V
ref+
4 -- I/O
General-purpose digital I/O pin
USCI B0 clock input/output, USCI A0 slave transmit enable
ADC10 analog input A4/ positive reference
Comparator_A input 6
P6.5/UCA0RXD/
UCA0SOMI/A5
5 -- I/O
General-purpose digital I/O pin
USCI A0 receive data input in UART mode, slave data out/master in in SPI mode
ADC10 analog input A5
P6.6/UCA0TXD/
UCA0SIMO/A6
6 -- I/O
General-purpose digital I/O pin
USCI A0 transmit data output in UART mode, slave data in/master out SPI mode
ADC10 analog input A6
P6.7/A7/CA7/
SVSIN
11 7 I/O
General-purpose digital I/O pin
ADC10 analog input A7
Comparator_A input 7
SVS input
P7.0/TDO/TDI/
S32 54 38 I/O General-purpose digital I/O pin
JTAG test data output terminal or test data input in programming an test
LCD segment output
P7.1/TDI/TCLK/
S33 55 39 I/O General-purpose digital I/O pin
JTAG test data input or test clock input in programming an test
LCD segment output
P7.2/TMS/S34 56 40 I/O General-purpose digital I/O pin
JTAG test mode select, input terminal for device programming and test
LCD segment output
†
64-pin package devices only