Texas Instruments LMK1C1104, User Manual

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By default, a shunt is placed on pins 2 and 3 to enable the outputs.
6 Output Clock
The LMK1C1104 fans out four LVCMOS outputs. The outputs can be loaded using the pullup and pulldown
footprints. No resistor has been soldered in those footprints.
The EVM board supports up to eight clock outputs for pin-compatible TSSOP packaged devices in the industry
standard footprint. The LMK1C1104 uses four of the 8 outputs shown in
Figure 1-1 . These outputs are Y0, Y1,
Y2, and Y3.
7 Bill of Materials
7.1 REACH Compliance
In compliance with the Article 33 provision of the EU REACH regulation we are notifying you that this EVM
includes component(s) containing at least one Substance of Very High Concern (SVHC) above 0.1%. These
uses from Texas Instruments do not exceed 1 ton per year. The SVHC’s are:
Table 7-1. REACH SVHC
COMPONENT
MANUFACTURER
COMPONENT TYPE
COMPONENT PART
NUMBER
SVHC SUBSTANCE
SVHC CAS (WHEN
AVAILABLE)
Molex
5.08 Pitch Eurostyle
Vertical Fixed Mount PCB
Terminal Block, 2 Circuits
039544-3002 Lead 7439-92-1
Table 7-2. Bill of Materials
DESIGNATOR QTY VALUE PACKAGE
REFERENCE PART NUMBER MANUFACTURER
C1 1 10uF 0805 C0805C106K8PACTU Kemet
C2 1 1uF 0603 C0603X105J8RAC7867 Kemet
C3, C4, C5 3 0.1uF 0402 C0402C104K8RACAUTO Kemet
H1, H2, H3, H4 4 4-40/0.25" Screw NY PMS 440 0025 PH B&F Fastener Supply
H5, H6, H7, H8 4 0.5" Standoff 1902C Keystone
J1 1 Terminal Block TH 039544-3002 Molex
J2, J4, J5, J8, J9 5 CON-SMA-EDGE-S RF SMA EDGE CON-SMA-EDGE-S RF Solutions Ltd.
J3 1 1x3 0.1 in. PBC03SAAN Sullins Connector
Solutions
L1 1 50Ω 1206 BLM31SN500SZ1L MuRata
R2, R4, R9, R10, R11,
R12, R25, R26, R27, R28 10 0Ω 0603 RC0603JR-070RL Yageo
SH1 1 1x2 Shunt SNT-100-BK-G Samtec
TP1 1 Red Test Point TH 5000 Keystone
TP2 1 Black Test Point TH 5001 Keystone
U1 1 LMK1C1104 8-TSSOP LMK1C1104PW Texas Instruments
C6, C7, C10, C11 4 5pF 0603 GRM1885C2A5R0CA01D MuRata
R1, R3, R5, R6, R17, R18,
R21, R22, R33, R34 10 100Ω 0603 CRCW0603100RFKEA Vishay-Dale
Output Clock www.ti.com
4 LMK1C1104 Low-Additive, Phase-Noise LVCMOS Clock Buffer Evaluation
Board SNAU249A – DECEMBER 2019 – REVISED DECEMBER 2020
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