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BU RF Solutions

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CU1216/TU1216 Family

Evaluation Board

Copyright © Philips Electronics Singapore Business Unit RF-Solutions 2004

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Summary of Contents for CU1216 Series

Page 1: ...BU RF Solutions 1 CU1216 TU1216 Family Evaluation Board Copyright Philips Electronics Singapore Business Unit RF Solutions 2004 ...

Page 2: ... Figure 1 1 CU1216 General Block Diagram 4 Figure 1 2 TU1216 General Block Diagram 5 Figure 4 1 Evaluation Board Layout 8 Figure 4 2 Physical Evaluation Board 9 Figure 5 1 TDA10021 Main User Interface Window 13 Figure 5 2 TDA10021 Board Configuration Window 14 Figure 5 3 TDA10021 Registers under lock condition 15 Figure 5 4 TDA10046 Main User Interface Window Download DSP code 17 Figure 5 5 TDA100...

Page 3: ... 3 Document Release History Date Revision Remarks Editor 08 Oct 2003 1_0 First release Lim Kui Yong Elicia Tiah 14 Jan 2004 1_1 1 Block Diagram and pinning update 2 TDA10021 Software Version update ver 2 8 Elicia Tiah ...

Page 4: ... AGC MPEG D D7 SER MPEG_T S_CLK MPEG_D ATA_ VAL MPEG_ PKT_SYNC SAW Output Formatter C BUS Demodulation Error Recovery AS 33V 5V AGC Vt 5V LT RF input RF Mod in RF out Ant_5 V Active Loopthrough The module consists of the following key features 1 Loopthrough RF Modulator input function Passive loopthrough LS Active loopthrough L and Active loopthrough RF Mod input LM versions are available 2 Tuner ...

Page 5: ... the digital demodulator in order to maintain a 2Vp p differential amplified IF output to the DVB T Receiver 4 Digital Demodulator TDA10046 is used which can support up to 2K and 8K COFDM Modes The output can be either a parallel or a serial MPEG 2 transport stream R F inp ut R F m od output 5Vsplitter supplyvolta ge optional OP TION A ntennapow er O PTION M odulatorinput 4 2 1 SA W high band m i ...

Page 6: ...3V Supply 3 3V 13 IF Intermediate Frequency unfiltered 14 GND Ground 15 MPEG D0 SER Parallel MPEG Transport Output Data Bit 0 Serial Output 16 MPEG D1 Parallel MPEG Transport Output Data Bit 1 17 MPEG D2 Parallel MPEG Transport Output Data Bit 2 18 MPEG D3 Parallel MPEG Transport Output Data Bit 3 19 MPEG D4 Parallel MPEG Transport Output Data Bit 4 20 MPEG D5 Parallel MPEG Transport Output Data B...

Page 7: ...ddress Select AS to C0 by putting a jumper at pin 3 4 of connector 1034 4 Load DUT at socket 1030 5 For CU1216 load TDA10021 software and follow the software instruction guide as in section 5 OR 6 For TU1216 load TDA10046 software and follow the software instruction guide as in section 5 7 Connect the QAM COFDM input signal at RFin connector of the DUT Check min supply current CU1216LM 380mA CU121...

Page 8: ...utput MPEG2 Transport Stream D Common socket to install CU1216 or TU1216 product E CU1216 DVB_C TU1216 DVB_T receiver The dimension of this board is approximately 150mm by 110mm Figure 4 1 Evaluation Board layout C LVDS interface for MPEG2 Transport Stream O p IIC Input Connector D Common Socket for DUT IF O p 1 8V option B On board IIC Buffer 2 5V option 5V Ant Power up option 4V Ext AGC PLL Addr...

Page 9: ...BU RF Solutions 9 Figure 4 2 Physical Evaluation Board ...

Page 10: ...ng voltage needed 4 1 2 Connectors 1000 5Volts supply with pin 1 5V and pin 2 Gnd 1033 Power Splitter output BNC 1037 IF Output BNC 1030 DUT socket 1040 IIC communication D25 male with the following pinnings Pin Description Pin Description 1 RESET SDD 14 2 15 3 16 4 17 CLK 5 18 6 19 7 20 8 21 9 SDA 22 10 GND 23 11 ACK 24 12 25 GND 13 GND 1020 Transport Stream Output with the following pinning Pin ...

Page 11: ...ion 1034 PLL synthesizer Address Selection option AS1 C6 pin 1 3 AS1 C0 pin 2 4 1035 PLL synthesizer Address Selection option AS0 not application for CU TU1216 1039 1 2Volts supply option not application for CU TU1216 1036 4 0Volts External AGC supply option 4 1 4 Hard Reset Connect Jumper 1038 to do a hard reset on the DUT ...

Page 12: ...ues 5 1 Software Installation To install the software copy all delivered files under a specific directory It is advisable to use PC controller with at least Pentium I processes If the OS used in the PC controller is Window 98 or Window ME no driver is needed For Windows NT install the proper driver read in Readme file To activate the program double click on the registration file REG followed by th...

Page 13: ...Fron End Run the algorithms to lock the complete system Channel Status BER BER indication after the demodulation RS decoder input RF AGC IF AGC Value between 0 and 255 indicating the tuner AGC level 0 to much power 255 not enough power MSE Mean square error indicating the signal quality low MSE means good signal quality AFC xxKHz Indication of the corrected frequency drift in KHz Activate Register...

Page 14: ...hed synchronization with the MPEG structure of the source packets Frontend Lock Indicator will turn green when IIC Communication has been established with the channel decoder Uncorrected Blocks Indicator will turn green when there are no uncorrected data blocks received by decoder FIGURE 5 2 TDA10021 BOARD CONFIGURATION WINDOW Set to CUSTOM MPEG TS Configuration Sampling Clock Control Tuner Config...

Page 15: ... counter depth Defines over many symbols the BER is measured For BER values the value must be set to 108 to get a reliable and stable value Equalizer Set the type of Equalizer DFE or Linear Transversal or disable the equalizer MPEG TS output1 Configure the MPEG TS output pins parallel mode or serial mode MPEG TS output2 Configure the MPEG TS output pins serial mode only delivered on the JTAG pins ...

Page 16: ...Pull down the View icon select Board Configuration which allow the user to set the TDA10021 Board configuration Necessary inputs are as followed refer to Figure 5 2 Under Board select Custom Under PLL enter crystal frequency 28920000Hz and PLL factor M 8 N 1 P 4 Return back to Main User Interface menu press successively the Program Front end button The system should lock immediately 5 3 Channel De...

Page 17: ...0046 MAIN USER INTERFACE WINDOW Load in DSP code DSP code icon Activate Register Mode LEDs indicators Channel Settings Program tuner and TDA10046 BER value Tuner AGC and IF AGC indicator IIC Control Window Tuner Setup Window Scattering Diagram BER graph Demodulator Setup Window Activate scanning mode ...

Page 18: ...f the corrected frequency drift in KHz BER BER indication after the demodulation RS decoder input RF AGC IF AGC Value between 0 and 255 indicating the tuner AGC level 0 to much power 255 not enough power LEDs indicators Tuner Lock Indicator will turn green when tuner has been successfully locked to a wanted frequency Frequency Lock Indicator will turn green when the channel decoder has detected a ...

Page 19: ...ner Configuration IF frequency Enter IF center frequency delivered by the tuner 36 125Mhz or 43 75Mhz Misc configuration BER counter depth Defines over many symbols the BER is measured PLL PLL factors M N P Set the different divider ratios of the PLL M sampling clk of 52Mhz Crystal frequency Specifies the Xtal frequency connected to the TDA10046 FIGURE 5 7 TDA10046 Registers MPEG TS Configuration ...

Page 20: ...een detected Test procedure for TU1216 family 1 Load DSP code refer to Figure 5 4 2 Input the followings in the Main User Interface menu refer to Figure 5 5 Wanted RF frequency Wanted BW 8Mhz Modulation 64QAM Code Rate 2 3 Guard Interval 1 8 FFT Size 8K 3 Pull down the View icon select Board Configuration which allow the user to set the TDA10046 Board configuration Necessary inputs are as followed...

Page 21: ...y current limitation on the 5 0Volts power supply 0 5A current is needed Press the I2 C check button to verify that I2 C communications are correct In the control software window press the configuration button check the type of tuner used should be set to PHILIPS Is the tuner in lock First allow the software to read the tuner registers Is the gain in an automatic configuration Is the RF input leve...

Page 22: ...BU RF Solutions 22 APPENDIX A Evaluation Board Schematic Diagram ...

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