Texas Instruments DS90UH927Q, Manual

Page: 10 / 59

Recommended Timing for the Serial Control Bus
Over 3.3V supply and temperature ranges unless otherwise specified. ( Note 2 , Note 3 , Note 4 )
Symbol Parameter Conditions Min Typ Max Units
f
SCL
SCL Clock Frequency
Standard Mode 0 100 kHz
Fast Mode 0 400 kHz
t
LOW
SCL Low Period
Standard Mode 4.7 µs
Fast Mode 1.3 µs
t
HIGH
SCL High Period
Standard Mode 4.0 µs
Fast Mode 0.6 µs
t
HD;STA
Hold time for a start or a
repeated start condition
Figure 9
Standard Mode 4.0 µs
Fast Mode 0.6 µs
t
SU:STA
Set Up time for a start or a
repeated start condition
Figure 9
Standard Mode 4.7 µs
Fast Mode 0.6 µs
t
HD;DAT
Data Hold Time
Figure 9
Standard Mode 0 3.45 µs
Fast Mode 0 0.9 µs
t
SU;DAT
Data Set Up Time
Figure 9
Standard Mode 250 ns
Fast Mode 100 ns
t
SU;STO
Set Up Time for STOP
Condition
Figure 9
Standard Mode 4.0 µs
Fast Mode 0.6 µs
t
BUF
Bus Free Time
Between STOP and START
Figure 9
Standard Mode 4.7 µs
Fast Mode 1.3 µs
t
r
SCL & SDA Rise Time,
Figure 9
Standard Mode 1000 ns
Fast Mode 300 ns
t
f
SCL & SDA Fall Time,
Figure 9
Standard Mode 300 ns
Fast mode 300 ns
DC and AC Serial Control Bus Characteristics
Over 3.3V supply and temperature ranges unless otherwise specified. ( Note 2 , Note 3 , Note 4 )
Symbol Parameter Conditions Min Typ Max Units
V
IH
Input High Level SDA and SCL
0.7*
V
DDIO
V
DD33
V
V
IL
Input Low Level Voltage SDA and SCL GND
0.3*
V
DD33
V
V
HY
Input Hysteresis >50 mV
V
OL
SDA or SCL, IOL = 1.25mA 0 0.36 V
I
in
SDA or SCL, Vin = V
DDIO
or GND
-10 +10 µA
t
R
SDA RiseTime – READ
SDA, RPU = 10k
Ω
, Cb
≤
400pF, Figure 9
430 ns
t
F
SDA Fall Time – READ 20 ns
t
SU;DAT
Set Up Time — READ Figure 9 560 ns
t
HD;DAT
Hold Up Time — READ Figure 9 615 ns
t
SP
Input Filter 50 ns
C
in
Input Capacitance SDA or SCL <5 pF
DS90UH927Q
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