ADV
ANCEINFORMA
TION
PWMSYNC1
VREFHI
VDDA
VSSA
R
PD
VDAC
DACCTL[DACREFSEL]
DACCTL[LOADMODE]
SYSCLK
DACCTL[SYNCSEL]
PWMSYNC2
PWMSYNC3
PWMSYNCn
...
0
1
D Q
>
D Q
>
DACVALS
0
1
2
…
n-1
0
1
DACVALA
Buffer
12-bit
DAC
VSSA
TMS320F28377S, TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881A – AUGUST 2014 – REVISED JUNE 2015
5.8.3
Buffered Digital-to-Analog Converter (DAC)
The buffered DAC module consists of an internal reference DAC and an analog output buffer that is
capable of driving an external load. An integrated pulldown resistor on the DAC output helps to provide a
known pin voltage when the output buffer is disabled. This pulldown resistor cannot be disabled and
remains as a passive component on the pin, even for other shared pin mux functions. Software writes to
the DAC value register can take effect immediately or can be synchronized with PWMSYNC events.
Each Buffered DAC has the following features:
•
12-bit programmable internal DAC
•
Selectable reference voltage
•
Pulldown resistor on output
•
Ability to synchronize with PWMSYNC
The block diagram for the buffered DAC is shown in
Figure 5-36. DAC Module Block Diagram
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
109
Product Folder Links: