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DAC8742HEVM Hardware Overview
9
SLAU700A – June 2017 – Revised November 2017
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Copyright © 2017, Texas Instruments Incorporated
DAC8742H Evaluation Module
4.6
Clock Configuration
The DAC8742H device supports a variety of clocking options in order to provide system flexibility and
reduce overall current consumption in HART applications. The clocking options include: an internal
oscillator (HART mode only), an external crystal oscillator, or an external CMOS clock.
Configure clock selection via the XEN, CLK_CFG1, and CLK_CFG0 pins (see
Table 9
).
Table 9. Clock Configuration
XEN
CLK_CFG1
CLK_CFG0
CLKO
Description
Mode
1
0
0
No output
3.6864-MHz CMOS clock connected at XTAL1
HART
1
0
1
No output
1.2288-MHz CMOS clock connected at XTAL1
1
1
0
No output
Internal oscillator enabled
1
1
1
1.2288-MHz output
Internal oscillator enabled, CLKO enabled
0
0
0
No output
Crystal oscillator enabled
0
0
1
3.6864-MHz output
3.6864-MHz crystal oscillator, CLKO enabled
0
1
0
1.8432-MHz output
1.8432-MHz crystal oscillator, CLKO enabled
0
1
1
1.2288-MHz output
1.2288-MHz crystal oscillator, CLKO enabled
1
0
0.5 × IOVDD
No output
4-MHz CMOS clock connected at XTAL1
FOUNDATION
Fieldbus and
PROFIBUS PA
1
1
0.5 × IOVDD
No output
2-MHz CMOS clock connected at XTAL1
0
0
0.5 × IOVDD
No output
4-MHz crystal oscillator
0
1
0.5 × IOVDD
4-MHz output
4-MHz crystal oscillator, CLKO enabled
The XTAL1 and XTAL2 pins of the DAC8742H device are also configurable through the JP1, JP2, and J1
jumpers (see
Table 10
).
Table 10. XTAL1 and XTAL2 Configuration Settings
Jumper
Description
JP1
(1 – 2) 3.686-MHz crystal
(2 – 3) 4-MHz crystal
JP2
(1 – 2) 3686-MHz crystal
(2 – 3) 4-MHz crystal
J1
Optional CMOS clock connection
