Texas Instruments CDC7005, User Manual, Page: 24 / 37

Application Level Circuit Diagram
5-2
5.1 Application Level Circuit Diagram
In the following applications sections all three loop filter configurations are
discussed.
5.1.1 Passive Loop Filter
The passive loop filter is a second order filter (two poles, one zero). The zero
is required for the overall loop stability. R1, C1, and C2 generate the dominant
pole of the system. A second pole is introduced by R2 and C3.
Figure 5 − 1. CDC7005 With a Passive Loop Filter Configuration
SPI
PECL_OUT_B
PECL_OUT
V_CTRL
VCXO
CP_OUT
OPA_IP
OPA_IN
OPA_OUT
VCXO_IN
VCXO_IN_B
CTRL_LE
CTRL_DATA
CTRL_CLK
REF_IN
YnB
Yn
CDC7005
STATUS_LOCK
STATUS_VCXO
STATUS_REF
245.76 MHz; Gain = 26.5kHz/V
Low-Pass Filter
R1
4.7 k Ω
C3
100 nF
R2
160 Ω
C2
100 nF
C1
22 µ F
10 nF 10 nF
10 nF
R
150
Ω
R
150
Ω
R
82
Ω
R
82
Ω
130 Ω
V
CC
V
CC
130 Ω
5.1.2 Active Loop Filter—Internal Operational Amplifier
The active loop filter requires zero for loop stability, which is generated by R2
and C2 components. The first pole is introduced by R3 and C3 and the second
pole is introduced by R1 and C1.