Texas Instruments CDC7005, User Manual, Page: 15 / 37

Connector Description
3-3 EVM Hardware
3.2 Connector Description
Table 3 − 1.Connectors, Switches, and Indicators
Reference Description
P1 Power supply 3.3 V
P2 GND
J5 Status outputs (STATUS_LOCK, STATUS_VCXO, STATUS_REF)
J6, J7 Y0/Y0B PECL differential output
J8, J9 Y1/Y1B PECL differential output
J10, J11 Y2/Y2B PECL differential output
J12, J13 Y3/Y3B PECL differential output
J14, J15 Y4/Y4B PECL differential output
J17 VCXO enable
J36 Reference clock input sense enable (on or off)
J19 Reference clock input
J20 Reference clock input sense
J21, J22 VCXO_IN/VCXO_INB input selector/VCXO output selector
J23, J24 External VCXO_IN/VCXO_INB input/VCXO output sense
J27 External programming interface by parallel port
J28 External programming interface by universal pins
J29, J34 Filter type selector
J30 Non-inverted OPA input selector (external or internal OPA)
J31 Power supply for external OPA (on or off)
J32 Inverted OPA input selector (external or internal OPA)
J33 OPA output selector (internal or external OPA)
J35 VCXO control voltage sense
SW1 Power-down key
SW2 Reset key
D1 STATUS_REF indicator
D2 STATUS_VCXO indicator
D3 STATUS_LOCK indicator
3.3 Hardware Configuration
This section describes the board configuration using on-board jumpers and
solder bridges.
Note:
Default settings are in italics.