LMZ10500
www.ti.com
SNVS723C – OCTOBER 2011 – REVISED MARCH 2013
OUTPUT VOLTAGE ACCURACY OPTIMIZATION
Each nano module is optimized to achieve high V
OUT
accuracy.
Equation 1
shows that, by design, the output
voltage is a function of the V
CON
voltage and the gain from V
CON
to V
FB
. The voltage at V
CON
is derived from
V
REF
. Therefore, as shown in
Equation 3
, the accuracy of the output voltage is a function of the V
REF
x GAIN
product as well as the tolerance of the R
T
and R
B
resistors. The typical V
REF
x GAIN product by design is 5.875V.
Each nano module's V
REF
voltage is trimmed so that this product is as close to the ideal 5.875V value as
possible, achieving high V
OUT
accuracy. See the
Electrical Specifications
for the V
REF
x GAIN product tolerance
limits.
DYNAMIC OUTPUT VOLTAGE SCALING
The V
CON
pin on the LMZ10500 can be driven externally by a DAC to scale the output voltage dynamically. The
output voltage V
OUT
= 2.5V/V x V
CON
. When driving V
CON
with a source different than V
REF
place a 1.5k
Ω
resistor
in series with the V
CON
pin. Current limiting the external V
CON
helps to protect this pin and allows the V
CON
capacitor to be fully discharged to 0V after fault conditions.
INTEGRATED INDUCTOR
The LMZ10500 uses a Low Temperature Co-fired Ceramic (LTCC) type 2.6 µH inductor with over 1.2A DC
current rating and soft saturation profile for up to 2A. This inductor allows for the 1.425mm maximum package
height providing an easy to use, compact solution with reduced EMI.
INPUT AND OUTPUT CAPACITOR SELECTION
The LMZ10500 is designed for use with low ESR multi-layer ceramic capacitors (MLCC) for its input and output
filters. Using a 10 µF 0603 or 0805 with 6.3V or 10V rating ceramic input capacitor typically provides sufficient
V
IN
bypass. Use of multiple 4.7 µF or 2.2µF capacitors can also be considered. Ceramic capacitors with X5R and
X7R temperature characteristics are recommended for both input and output filters. These provide an optimal
balance between small size, cost, reliability, and performance for space sensitive applications.
The DC voltage bias characteristics of the capacitors must be considered when selecting the DC voltage rating
and case size of these components. The effective capacitance of an MLCC is typically reduced by the DC
voltage bias applied across its terminals. For example, a typical 0805 case size X5R 6.3V 10 µF ceramic
capacitor may only have 4.8 µF left in it when a 5.0V DC bias is applied. Similarly, a typical 0603 case size X5R
6.3V 10 µF ceramic capacitor may only have 2.4 µF at the same 5.0V DC. Smaller case size capacitors may
have even larger percentage drop in value with DC bias.
The optimum output capacitance value is application dependent. Too small output capacitance can lead to
instability due to lower loop phase margin. On the other hand, if the output capacitor is too large, it may prevent
the output voltage from reaching the 0.375V required voltage level at the end of the startup sequence. In such
cases, the output short circuit protection can be engaged and the nano module will enter a hiccup mode as
described in the
OUTPUT SHORT CIRCUIT PROTECTION
section.
Table 1
sets the minimum output
capacitance for stability and maximum output capacitance for proper startup for various output voltage settings.
Note that the maximum C
OUT
value in
Table 1
assumes that the filter capacitance on V
CON
is the maximum
recommended value of 1nF and the R
T
resistor value is less than 300k
Ω
. Lower V
CON
capacitance can extend
the maximum C
OUT
range. There is no great performance benefit in using excessive C
OUT
values.
Table 1. Output Capacitance Range
Output Voltage
Minimum
Suggested
Maximum
C
OUT
C
OUT
C
OUT
0.6V
4.7µF
10µF
33µF
1.0V
3.3µF
10µF
33µF
1.2V
3.3µF
10µF
33µF
1.8V
3.3µF
10µF
47µF
2.5V
3.3µF
10µF
68µF
3.3V
3.3µF
10µF
68µF
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