Texas Instruments AN-2166 LMZ10500 Manual Download Page 20 | Manualshive

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LMZ10500

SNVS723C – OCTOBER 2011 – REVISED MARCH 2013

www.ti.com

REVISION HISTORY

Changes from Revision B (March 2013) to Revision C

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Changed layout of National Data Sheet to TI format ..........................................................................................................

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Copyright © 2011–2013, Texas Instruments Incorporated

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LMZ10500

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Summary of Contents for AN-2166 LMZ10500

Page 1: ...Current Limit Protection Quick Overview Links VOUT 1 2V 1 8V 2 5V Thermal Shutdown Protection 3 3V Input Voltage UVLO for Power up Power down and Brown out Conditions Typical Efficiency at VIN 3 6V Only 5 External Components Resistor Divider and 3 Ceramic Capacitors APPLICATIONS Point of Load Conversions from 3 3V and 5V Rails Space Constrained Applications Low Output Noise Applications ELECTRICAL...

Page 2: ...VOUT 4 SGND Ground for analog and control circuitry Connect to PGND at a single point 5 VOUT Output Voltage Connected to one terminal of the integrated inductor Connect output filter capacitor between VOUT and PGND 6 PGND Power ground for the power MOSFETs and gate drive circuitry 7 VIN Voltage supply input Connect ceramic capacitor between VIN and PGND as close as possible to these two pins Typic...

Page 3: ...sed on 4 layer board thermal measurements performed under the conditions and guidelines set forth in the JEDEC standards JESD51 1 to JESD51 11 θJA varies with PCB copper area power dissipation and airflow Electrical Characteristics 1 Specifications with standard typeface are for TJ 25 C only Limits in bold face type apply over the operating junction temperature range TJ of 40 C to 125 C Minimum an...

Page 4: ...built in fixed and not adjustable System Characteristics The following specifications are guaranteed by design providing the component values in the Typical Application Circuit are used CIN COUT 10 µF 6 3V 0603 TDK C1608X5R0J106K These parameters are not guaranteed by production testing Unless otherwise stated the following conditions apply TA 25 C Symbol Parameter Conditions Min Typ Max Units ΔVO...

Page 5: ...CIN COUT 10 µF 6 3V 0603 TDK C1608X5R0J106K These parameters are not guaranteed by production testing Unless otherwise stated the following conditions apply TA 25 C Symbol Parameter Conditions Min Typ Max Units VIN 5 0V Load TR TF 40 µs Load transient response 25 mV pk pk Transient VOUT 1 8V IOUT 65mA to 650mA Copyright 2011 2013 Texas Instruments Incorporated Submit Documentation Feedback 5 Produ...

Page 6: ...OPOUT VOLTAGE V LOAD CURRENT A VIN 2 7V VIN 3 3V VIN 3 6V VIN 4 0V 60 70 80 90 100 110 120 130 0 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 OUTPUT CURRENT A AMBIENT TEMPERATURE C VIN 3 3V VIN 3 6V VIN 5 0V VIN 5 5V LMZ10500 SNVS723C OCTOBER 2011 REVISED MARCH 2013 www ti com Typical Performance Characteristics Unless otherwise specified the following conditions apply VIN 3 6V TA 25 C Dropout Voltage vs Load Cu...

Page 7: ... ti com SNVS723C OCTOBER 2011 REVISED MARCH 2013 Typical Performance Characteristics continued Unless otherwise specified the following conditions apply VIN 3 6V TA 25 C Conducted EMI VIN 5 0V VOUT 1 8V IOUT 650mA Default evaluation board BOM with additional 1µH 1µF LC input filter Startup Figure 8 Figure 9 Copyright 2011 2013 Texas Instruments Incorporated Submit Documentation Feedback 7 Product ...

Page 8: ...ENCY LOAD CURRENT A VIN 2 7V VIN 3 3V VIN 3 6V VIN 5 0V VIN 5 5V FB EN VREF SGND PGND 1 2V VOUT VIN COUT CIN VOUT VCON VIN CVC RB RT CIN COUT CVC RT RB 243 k 1 0603 63 4 k 1 0603 10 P 8 6 3V 0805 X7R or X5R 10 PF 8 6 3V 0805 X7R or X5R 470 pF 8 6 3V 0603 X7R or X5R LMZ10500 SNVS723C OCTOBER 2011 REVISED MARCH 2013 www ti com 1 2V Schematic VOUT 1 2V Efficiency VOUT 1 2V Figure 10 Figure 11 Output ...

Page 9: ...IENCY LOAD CURRENT A VIN 2 7V VIN 3 3V VIN 3 6V VIN 5 0V VIN 5 5V FB EN VREF SGND PGND 1 8V VOUT VIN COUT CIN VOUT VCON VIN CVC RB RT CIN COUT CVC RT RB 187 k 1 0603 82 5 k 1 0603 10 P 8 6 3V 0805 X7R or X5R 10 PF 8 6 3V 0805 X7R or X5R 470 pF 8 6 3V 0603 X7R or X5R LMZ10500 www ti com SNVS723C OCTOBER 2011 REVISED MARCH 2013 1 8V Schematic VOUT 1 8V Efficiency VOUT 1 8V Figure 16 Figure 17 Output...

Page 10: ...CIENCY LOAD CURRENT A VIN 3 3V VIN 3 6V VIN 5 0V VIN 5 5V FB EN VREF SGND PGND 2 5V VOUT VIN COUT CIN VOUT VCON VIN CVC RB RT 10 P 8 6 3V 0805 X7R or X5R CIN COUT CVC RT RB 10 PF 8 6 3V 0805 X7R or X5R 470 pF 8 6 3V 0603 X7R or X5R 150 k 1 0603 118 k 1 0603 LMZ10500 SNVS723C OCTOBER 2011 REVISED MARCH 2013 www ti com 2 5V Schematic VOUT 2 5V Efficiency VOUT 2 5V Figure 22 Figure 23 Output Ripple V...

Page 11: ...ENCY LOAD CURRENT A VIN 3 6V VIN 4 0V VIN 4 5V VIN 5 0V VIN 5 5V FB EN VREF SGND PGND 3 3V VOUT VIN COUT CIN VOUT VCON VIN CVC RB RT CIN COUT CVC RT RB 118 k 1 0603 150 k 1 0603 10 P 8 6 3V 0805 X7R or X5R 10 PF 8 6 3V 0805 X7R or X5R 470 pF 8 6 3V 0603 X7R or X5R LMZ10500 www ti com SNVS723C OCTOBER 2011 REVISED MARCH 2013 3 3V Schematic VOUT 3 3V Efficiency VOUT 3 3V Figure 28 Figure 29 Output R...

Page 12: ...ated Inductor REFERENCE VOLTAGE OSCILLATOR VIN UVLO L COMP CURRENT SENSE UVLO TSD LMZ10500 SNVS723C OCTOBER 2011 REVISED MARCH 2013 www ti com BLOCK DIAGRAM Figure 34 Functional Block Diagram 12 Submit Documentation Feedback Copyright 2011 2013 Texas Instruments Incorporated Product Folder Links LMZ10500 ...

Page 13: ... turned OFF and NFET is turned ON ramping down the inductor current with a slope of VOUT L At the next rising edge of the clock the cycle repeats An increase of load pulls the output voltage down resulting in an increase of the error signal As the error signal goes up the peak inductor current is increased elevating the average inductor current and responding to the heavier load To ensure stabilit...

Page 14: ... The VCON pin is discharged internally through a pull down device before startup occurs This is done to deplete any residual charge on the VCON filter capacitor and allow the VCON voltage to ramp up from 0V when the part is started The events that cause VCON discharge are thermal shutdown UVLO EN low or output short circuit detection The minimum recommended capacitance on VCON is 220pF and the max...

Page 15: ...sition mode designed to extend the output regulation range to the minimum possible input voltage As the input voltage decreases closer and closer to VOUT the off time of the PFET gets smaller and smaller and the duty cycle eventually needs to reach 100 to support the output voltage The input voltage at which the duty cycle reaches 100 is the edge of regulation When the LMZ10500 input voltage is lo...

Page 16: ...d 2 35V VREF voltage output As shown in Figure 38 above a resistive divider formed by RT and RB sets the VCON pin voltage level The VOUT voltage tracks VCON and is governed by the following relationship VOUT GAIN x VCON where GAIN is 2 5V V from VCON to VFB 1 This equation is valid for output voltages between 0 6V and 3 6V and corresponds to VCON voltage between 0 24V and 1 44V respectively RT and...

Page 17: ...erature characteristics are recommended for both input and output filters These provide an optimal balance between small size cost reliability and performance for space sensitive applications The DC voltage bias characteristics of the capacitors must be considered when selecting the DC voltage rating and case size of these components The effective capacitance of an MLCC is typically reduced by the...

Page 18: ...ashing the solder paste Slow the pick arm when picking the part from the tape and reel carrier and when depositing the IC on the board If the machine releases the component by force use minimum force or no more than 3 Newtons For PCBs with surface mount components on both sides it is suggested to put the LMZ10500 on the top side In case the application requires bottom side placement a reflow fixtu...

Page 19: ... board for any Buck converter The LMZ10500 integrates the inductor and simplifies the DC DC converter board layout Refer to the example layout in Figure 39 There are a few basic requirements to achieve a good LMZ10500 layout 1 Place the input capacitor CIN as close as possible to the VIN and PGND terminals VIN pin 7 and PGND pin 6 on the LMZ10500 are next to each other which makes the input capaci...

Page 20: ... www ti com REVISION HISTORY Changes from Revision B March 2013 to Revision C Page Changed layout of National Data Sheet to TI format 19 20 Submit Documentation Feedback Copyright 2011 2013 Texas Instruments Incorporated Product Folder Links LMZ10500 ...

Page 21: ...ucts are suitable for use in specified lead free processes Pb Free RoHS Exempt This component has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS no Sb Br TI defines Green to mean Pb Free RoHS comp...

Page 22: ...UM www ti com 31 May 2013 Addendum Page 2 In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis ...

Page 23: ...th W1 mm A0 mm B0 mm K0 mm P1 mm W mm Pin1 Quadrant LMZ10500SH NOPB POS NQB 8 1000 178 0 12 4 3 8 3 8 2 2 8 0 12 0 Q1 LMZ10500SHE NOPB POS NQB 8 250 178 0 12 4 3 8 3 8 2 2 8 0 12 0 Q1 LMZ10500SHX NOPB POS NQB 8 3000 330 0 12 4 3 8 3 8 2 2 8 0 12 0 Q1 PACKAGE MATERIALS INFORMATION www ti com 26 Mar 2013 Pack Materials Page 1 ...

Page 24: ...ing Pins SPQ Length mm Width mm Height mm LMZ10500SH NOPB POS NQB 8 1000 210 0 185 0 35 0 LMZ10500SHE NOPB POS NQB 8 250 210 0 185 0 35 0 LMZ10500SHX NOPB POS NQB 8 3000 367 0 367 0 35 0 PACKAGE MATERIALS INFORMATION www ti com 26 Mar 2013 Pack Materials Page 2 ...

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Page 28: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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