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SBAS492 – JULY 2015
Figure 118. Ch n Hysteresis Registers
7
6
5
4
3
2
1
0
CHn_HYST[3:0]
0
0
0
0
R/W-0h
R-0h
R-0h
R-0h
R-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 21. Channel n Hysteresis Register Field Descriptions
(n = 0 to 7 for the ADS8668; n = 0 to 3 for the ADS8664)
Bit
Field
Type
Reset
Description
7-4
Channel
n
Hysteresis[7-4]
R/W
0h
These bits set the channel high and low alarm hysteresis for
(n = 0 to 7 for the ADS8668;
channel
n (n = 0 to 7 for the ADS8668; n = 0 to 3 for the
n = 0 to 3 for the ADS8664)
ADS8664)
For example, bits 3-0 of the channel 0 register (address 15h) set
the channel 0 alarm hysteresis.
0000 = No hysteresis
0001 = ±1-LSB hysteresis
0010 to 1110 = ±2-LSB to ±14-LSB hysteresis
1111 = ±15-LSB hysteresis
3-0
Channel
n
Hysteresis[3-0]
R
0h
Read-only bit; internally set to 0
(n = 0 to 7 for the ADS8668;
n = 0 to 3 for the ADS8664)
Figure 119. Ch n High Threshold MSB Registers
7
6
5
4
3
2
1
0
CHn_HT[11:4]
R/W-1h
LEGEND: R/W = Read/Write; -n = value after reset
Table 22. Channel n High Threshold MSB Register Field Descriptions
(n = 0 to 7 for the ADS8668; n = 0 to 3 for the ADS8664)
Bit
Field
Type
Reset
Description
7-0
CH
n
_HT[15:8]
R/W
1h
These bits set the MSB byte for the 12-bit channel
n
high alarm.
(n = 0 to 7 for the ADS8668;
For example, bits 7-0 of the channel 0 register (address 16h) set
n = 0 to 3 for the ADS8664)
the MSB byte for the channel 0 high alarm threshold. The
channel 0 high alarm threshold is AAF0h when bits 7-0 of the ch
0 high threshold MSB register (address 16h) are set to AAh and
bits 3-0 of the ch 0 high threshold LSB register (address 17h)
are set to 1111.
0000 0000 = MSB byte is 00h
0000 0001 = MSB byte is 01h
0000 0010 to 1110 1111 = MSB byte is 02h to FEh
1111 1111 = MSB byte is FFh
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