Texas Instruments ADS42JBx9, User Manual, Page: 18 / 24

Basic Test Setup
www.ti.com
(JESD_SYNC) illuminating on the ADS42JBx9EVM.
10. Once synchronization has been established, LED D3 on the ADS42JBx9EVM will turn off. The status
LED's on the JESD204B Translation card should have the following states:
D8 - On (OSERDES MMCM lock)
D7 - On (GTX CDR lock)
D6 - Off (not used)
D5 - On (~SYNC)
D4 - On (Data Valid)
D3 - Off (not used)
D2 - Blinking (devclkA indicator)
D1 - Blinking (devclkB indicator)
11. If the status of the LED's are not as shown above, press the CPU RESET button (SW6) on the
JESD204B Translation card to reset the firmware. Once the status of the LED's is as shown above, the
JESD204B Translation will now be receiving valid data from the ADC and sending valid data and a
clock to the TSW1400EVM.
12. Since a periodic SYSREF signal acts as a sub-harmonic clock of the converter sampling clock and
may have spurious effect on the converter performance, it may be turned off during normal operation
once synchronization has been achieved.
To turn off SYSREF, click on the LMK04828 Outputs tab, then click on the SYSREF button. In the
lower panel, go to the MUX panel and set this to SYSREF PULSES. This will turn off all of the
SYSREF outputs of the LMK device.
NOTE: If SYSREF is turned off during normal operation, TX and RX devices must have the ability to
generate a SYSREF request to the LMK04828 clock generator whenever a synchronization
request is detected at the SYNC interface.
13. If the JESD204B link does not get established, make sure the SYSREF MUX panel on the
ADS42JBx9 GUI is set to SYSREF CONTINUOUS. If this is set to any other value, the SYSREF
outputs will be disabled from the LMK04828, thus possibly preventing synchronization from occurring.
If SYSREF MUX is set properly and the link is still invalid, press the FPGA_PROG_B switch (SW9) on
the JESD204B Translation card. After the FPGA DONE LED illuminates, press the CPU RESET. If this
does not provide synchronization, cycle power to the ADC EVM to reset all of the ADC and LMK
internal registers and repeat steps 1-10.
18 ADS42JBx9 System Evaluation Kit SLAU468A – November 2012
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated