Texas Instruments ADS42JBx9, User Manual, Page: 15 / 24

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Basic Test Setup
Table 4. Input and Output Connectors, Jumpers and Switches Description of the JESD204B
Translation Card (continued)
Component Description
JP1 (Y1 PWR) Power enable to 10-MHz oscillator Y1. Default is power on.
JP2 (REF SEL) Selects SMA J9 or Y1 for use as an input clock source to FPGA.
Default is Y1.
SJP12 Selects either 3.3 V or 1.8 V for Bank 0 VCC I/O reference.
Default is 3.3 V.
SJP14 Selects either 3.3 V or 1.8 V for Bank 14 VCC I/O reference.
Default is 3.3 V.
SJP15 Selects either 3.3 V or 1.8 V for Bank 15 VCC I/O reference.
Default is 3.3 V.
SJP16 Selects either 2.5 V or 1.8 V for Bank 16 VCC I/O reference.
Default is 2.5 V.
SJP17 Selects either 2.5 V or 1.8 V for Bank 17 VCC I/O reference.
Default is 2.5 V.
SJP18 Selects either 2.5 V or 1.8 V for Bank 18 VCC I/O reference.
Default is 2.5 V.
SJP2-SJP7, SJP20 USB or J12 control of EEPROM programming. Default is neither.
JP10-JP13 USB or JTAG control of FPGA programming. Default is JTAG
SJP13 FPGA or USB control of EEPROM chip select. Default is FPGA
SJP19 Sets CFGBVS pin voltage to either 3.3 V or GND. Default is 3.3
V.
SJP8-SJP11 Power monitor program pin interface. Selects either J14 or USB.
Default is J14
3 Basic Test Setup
This section outlines basic testing of the ADS42JB69SEK.
3.1 Test Block Diagram
The test setup for the ADS42JBx9SEK is shown in Figure 11 . The TSW1400EVM is used to capture data
from the ADS42JBx9EVM through the JESD204B Translation card, which is then transferred to the
computer for analysis in the HSDCPro software. The analog signal source shown is an HP8644B signal
generator, however any analog signal source can be used. The clock source is from the LMK04828, but
the board provides an option to use an external clock source, such as a HP8644B for the ADC sample
clock. This involves a different setup, which is described in more detail, in the TI application note called
"Achieve 16bit Performance with ADS42JB69 and LMK04828".
Note that there are filters on the analog source, which is necessary to achieve the best performance. The
performance can be increased using external clock mode as this allows for the use of a filter on the clock
source.
15 SLAU468A – November 2012 ADS42JBx9 System Evaluation Kit
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